[IBIS-Users] Question about P/G RLC?

From: Eric Hsu <ehsu@netlogicmicro.com>
Date: Mon Mar 29 2004 - 11:13:26 PST

Hi experts,

In general, there are multiple power and ground pins in the chip level ibis model. Assuming EDA tool will short all the same power or ground as long as they have the same name, which mean their RLC will become parallel connect. My question are:
Case1. If extraction package parasitic RLC for power and ground only by single port value, does that mean I need to multiply by the number of port?
(ex: if single port value is
R=10m
L=1n
C=1p
and if there are 3 pin for this gnd, then
[Pin] signal_name model_name R_pin L_pin C_pin
P1 GND GND 30m 3n 3p
P2 GND GND 30m 3n 3p
P3 GND GND 30m 3n 3p
)
Case2. If our tool/vendor have the capability to extract different R/L/C for power/ground for every ball/pin due to different ball/pin location, is it the better than case1 to apply into ibis model?

In my imagination, I guess case2 may be better than case1 because user may only connect partial power/ground pin/ball, it seems only case2 can provide accurate R/L/C.
Any professional comment?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems, Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198
This e-mail contains NetLogic Microsystems, Inc. Confidential information

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Received on Mon Mar 29 11:12:48 2004

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