Re: [IBIS-Users] [pin] spec?

Hi Eric:

You raise some good questions regarding how to document electrical
pins that do not functionally correspond to any IBIS [Model] Model_type.
My views are in your text.

Bob

Eric Hsu wrote:
> Hi IBIS experts,
>
> There are two questions about [pin] spec. of IBIS model:
> Q1. Is it really necessary we should cover all of the pins assignment under
  [Pin] segment? For example, if there is a chip with 400 pins, but only 390 pins
are really useful for application. Can I just have this ibis model only contain
these 390 pins and skip the rest of 10 pins? In other words, can I make a ibis
model only have 390 pins for 400 pins package?
>
BR - I recommend that you document each pin that has an electrical
connection. In this way, the IBIS model will correspond to the
data sheet and to the physical footprint of the part. Also there
will not be any ambiguity regarding whether any pin was omitted by
mistake. However, many tools will allow you to document fewer
pins than actually exist as long as nets connected to the non-documented
pins are not brought into the analysis.

  Q2. If I have to specify all the pins including some pins not for real
application (400 pins need to be specified in Q1, but not 390 only), what
is the most appropriate model name I should use to describe these ten pins
(by Q1 case) ? In terms of IBIS spec.(4.1), it only mention there are three
name reserved for model name, which are POWER, GND and NC. I really don't
like NC to solve this issue because it imply these 10 pins are "not connected"
(if assuming this is definition of IBIS spec.), but actually maybe they are
not. Based on this thought, it may cause other unwanted problems. Because by
using "NC", it seems not really restrict the any possible way (such as short
with power, ground or any signal) to connect these pins on PCB, either for
testing or application.

BR - NC is probably the best designation, and it really stands for
anything that is not covered by an IBIS model. These pins may have
functionality outside of what is described by IBIS (analog functions,
locations for timing capacitors, compensation networks, or gain
setting resistors) or might be of marginal usage in high speed digital
signal analysis (reference voltage sensing). The NC designates that
simulations of nets connected to these pins are functionally meaningless
for IBIS models regardless of whether is is connected electrically or
is physically open.

BR- You could document these pins by comment lines or [Notes] in the
IBIS model so that the model user understands why the NC is used.

>
> Best Regards,
>
> Eric Hsu
> Interface Technologies
> NetLogic Microsystems, Inc.
> 450 National Ave.
> Mountain View, CA 94043
> 650-961-6676 x198
> This e-mail contains NetLogic Microsystems, Inc. Confidential information
>
>

-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
503-239-5536                       Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065
bob@teraspeed.com                  503-246-8048 Direct
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