[IBIS-Users] RE: [pin] spec?

Hi Tom/Bob/Michael,

I really agree with your point. IBIS model should contain complete pins assignment responding to really chip. But I don't think by using "NC" as model_name is the best idea, because sometimes you may have pins are really connected with silicon, but not design for general application. If possible, I hope IBIS spec. can reserve "DNC" (Do Not Connect) as well as "NC" (Not Connect) for model_name. If checking the JEDEC latch-up specification, JESD78, I saw a definition for an "NC" pin:

  "No Connect" pin

  A pin that has no internal connection and that can be used as a support
  for external wiring without disturbing the function of the device.

  NOTE - All "no connect" pins shall be left in an open (floating) state
         during latch-up testing.

So, if the pin actually touches silicon, it is NOT an "NC" pin. It makes
sense, in my opinion, to rename pins from "NC" to "DNC", if those pins
do touch silicon. Presumably, ESD and latch-up testing will be performed
on the "DNC" pins.

Michael, how do you think?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems, Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198
This e-mail contains NetLogic Microsystems, Inc. Confidential information

-----Original Message-----
From: Tom Dagostino [mailto:tom@teraspeed.com]
Sent: Friday, May 21, 2004 4:07 PM
To: Bob Ross; Eric Hsu
Cc: twesterh@cisco.com
Subject: RE: [pin] spec?

There are all kinds of sollutions to this. My preference would be to either
NC them if they are truely never going to be connected by anybody or put the
functionality of the pins into the model whether they are inputs, outputs,
etc. The person who is designing the test fixture at your company might
want to do a simulation of the test card so having the real models behind
them would be good. But they should be in the pin list.

Tom Dagostino
Teraspeed Consulting Group LLC
503-430-1065
tom@teraspeed.com
www.teraspeed.com

-----Original Message-----
From: Bob Ross [mailto:bob@teraspeed.com]
Sent: Friday, May 21, 2004 4:02 PM
To: Eric Hsu
Cc: twesterh@cisco.com; Tom Dagostino; bob@teraspeed.com
Subject: Re: [pin] spec?

Eric:

I would actually prefer to see AJ22 fully included in the
[Pin] list.

Here it could be NC where the default R_pkg, L_pkg, C_pkg
are used, or it could be a stub Terminator model with some
minor C_comp loading or whatever. In your case, you might
just create some "factory_setting" models. You can still
explain this with a |.. comment.

One reason for including all pins is that some tools may
provide part visualization graphics. Unfortunately, one
BGA Viewer freeware tool does not show the NC connections.

   http://www.ic-emc.org/

Bob

Eric Hsu wrote:

> Hi Bob/Todd/Tom
>
> Thanks again. Because the pins that I'm talking about are for "factory
testing," and the customer is not supposed to connect them to anything, we
think the following format (for AJ22, for example) will be okay:
>
> [Pin] signal_name model_name R_pin L_pin C_pin
> A10 GND GND 0.0055 2.9629nH 9.2843pF
> ...
> |AJ22 TP00 | FOR FACTORY USE ONLY (Do Not Connect)
>
> So, the IBIS model will list all pins, but some will be as comments.
According to some concern for cross talk, I don't think it will really
affect our customer because these pins are designated as factory use only,
it suppose to be no connection at all in any simulation environment. So,
there is no coupling effect anyway.
>
> Best Regards,
>
> Eric Hsu
> Interface Technologies
> NetLogic Microsystems, Inc.
> 450 National Ave.
> Mountain View, CA 94043
> 650-961-6676 x198
> This e-mail contains NetLogic Microsystems, Inc. Confidential information
>
> -----Original Message-----
> From: Eric Hsu
> Sent: Friday, May 21, 2004 10:22 AM
> To: 'Bob Ross'; twesterh@cisco.com; 'Tom Dagostino'
> Subject: RE: [pin] spec?
>
>
> Hi Bob/Todd/Tom
>
> Thank for your professional comment.
>
> Best Regards,
>
> Eric Hsu
> Interface Technologies
> NetLogic Microsystems, Inc.
> 450 National Ave.
> Mountain View, CA 94043
> 650-961-6676 x198
> This e-mail contains NetLogic Microsystems, Inc. Confidential information
>
>
>
> -----Original Message-----
> From: Bob Ross [mailto:bob@teraspeed.com]
> Sent: Friday, May 21, 2004 8:40 AM
> To: twesterh@cisco.com
> Cc: Eric Hsu; 'Arpad Muranyi (E-mail)'; 'Michael Mirmak (E-mail)';
> bob@teraspeed.com
> Subject: Re: [pin] spec?
>
>
> Eric:
>
> I will add to Todd's (and Tom's) view that this is a viable option.
>
> However, I would use "Terminator" models as stubs to avoid the
> impression that these are inputs. Terminators can consist of
> only C_comp and do not add the digital logical threshholds.
> Terminators could also be used to stub in reference voltage sense
> points. As Tom pointed out, you could mimic some active sources
> with IBIS Outputs models (such as a 50 ohm linear amplifier or
> the low impedance output of an operation amplifier resulting
> from an estimated feedback network.
>
> The option is to put the closest stub model that could be
> used indirectly or directly for some second order electrical
> interactions. However, the style tradeoff is that such added
> detail might incorrectly convey to the user that the detailed
> models actually represent the first order electrical operation.
>
> Bob
>
>
> Todd Westerhoff (twesterh) wrote:
>
>>Eric,
>>
>>I saw feedback somewhere along the way that was essentially the same as
what
>>I would have said:
>>
>>Unused analog signals of any type (PLL references, Vref inputs, etc) are
>>preferably modeled as IBIS "Input" signals with some representative Ccomp
>>loading. Input thresholds usually don't matter much here. The reason we
>>look for this is the case where we want to model digital crosstalk
coupling
>>noise onto the line. Admittedly, we don't do this that often, but we like
>>to be able to do it if needed.
>>
>>As a general rule, we want to see ALL device pins included where possible
>>(for example, as in the [Pin] section). Technically, it's not needed, but
>>it lends a level of credibility to the idea that the model is accurate and
>>complete.
>>
>>Hope that helps,
>>
>>Todd.
>>
>>Todd Westerhoff
>>High Speed Design Specialist
>>Cisco Systems
>>1414 Massachusetts Ave - Boxboro, MA - 01719
>>email:twesterh@cisco.com
>>ph: 978-936-2149
>>============================================
>>
>>"In my daughter's eyes, I am a hero
>> I am strong and wise, and I know no fear
>> But the truth is plain to see; she was sent to rescue me
>> I see who I want to be, in my daughter's eyes"
>>
>>- Martina McBride, "In My Daughter's Eyes"
>>
>>
>>
>>-----Original Message-----
>>From: Eric Hsu [mailto:ehsu@netlogicmicro.com]
>>Sent: Thursday, May 20, 2004 5:38 PM
>>To: Bob Ross (E-mail); Arpad Muranyi (E-mail); Todd Westerhoff (E-mail);
>>Michael Mirmak (E-mail)
>>Subject: FW: [pin] spec?
>>
>>
>>Hi Bob/Arpad/Todd/Michael,
>>
>>I had ever tried to send the following question to IBIS user, but so far I
>>did not get really useful feedback.(Maybe it's because the question I ask
is
>>very trivial?) If possible, I would like to hear some of IBIS experts
>>feedback from your gentleman.
>>
>>
>>>There are two questions about [pin] spec. of IBIS model:
>>>Q1. Is it really necessary we should cover all of the pins assignment
>>>under [Pin] segment? For example, if there is a chip with 400 pins,
>>>but only 390 pins are really useful for application. Can I just have
>>>this ibis model only contain these 390 pins and skip the rest of 10
>>>pins? In other words, can I make a ibis model only have 390 pins for
>>>400 pins package? Q2. If I have to specify all the pins including some
>>>pins not for real application (400 pins need to be specified in Q1,
>>>but not 390 only), what is the most appropriate model name I should
>>>use to describe these ten pins (by Q1 case) ? In terms of IBIS
>>>spec.(4.1), it only mention there are three name reserved for model
>>>name, which are POWER, GND and NC. I really don't like NC to solve
>>>this issue because it imply these 10 pins are "not connected" (if
>>>assuming this is definition of IBIS spec.), but actually maybe they
>>>are not. Based on this thought, it may cause other unwanted problems.
>>>Because by using "NC", it seems not really restrict the any possible
>>>way (such as short with power, ground or any signal) to connect these
>>>pins on PCB, either for testing or application.
>>>
>>>Best Regards,
>>>
>>>Eric Hsu
>>>Interface Technologies
>>>NetLogic Microsystems, Inc.
>>>450 National Ave.
>>>Mountain View, CA 94043
>>>650-961-6676 x198
>>>This e-mail contains NetLogic Microsystems, Inc. Confidential
>>>information
>>>
>>>
>>
>>
>

--
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
503-239-5536                       Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065
bob@teraspeed.com                  503-246-8048 Direct

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