RE: [IBIS-Users] V-t curves offset

Nitin,
I think you are correct; the delay of an IBIS buffer isn't relevant.

Ramiro,
If you are testing the IBIS buffer in HSPICE, try adjusting the delay of
the input stimulus to get the output waveforms aligned.

Aubrey Sparkman
Enterprise Engineering Signal Integrity Team
Dell, Inc.
Aubrey_Sparkman@Dell.com
(512) 723-3592

-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Bhagwath, Nitin
Sent: Tuesday, October 12, 2004 8:22 PM
To: RODRIGUEZ_LECONA_RAMIRO; ibis-info@eda.org; ibis-users@eda.org
Subject: RE: [IBIS-Users] V-t curves offset

Hi Ramiro,

Ibis models are one port models, and so do not have a concept of
input-to-output delays. So you can't really compare a transition time
from a two port Spice model with a one port Ibis model which might use a
stimulus to generate its output waveform.

If this has changed, or is being planned to change, I would be most
interested in finding out (and using!).

Regards
-Nitin

-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of RODRIGUEZ_LECONA_RAMIRO
Sent: Tuesday, October 12, 2004 5:36 PM
To: ibis-info@eda.org; ibis-users@eda.org
Subject: [IBIS-Users] V-t curves offset

Hi all,

     I'm working with IBIS models validation and I have a problem
correlating the IBIS model with transistor level buffer in HSPICE. I
simulate both buffers with the same conditions (same load, temperature,
voltage supply) and the rising/falling edges of the outputs are equal
but there is a delay between IBIS model output waveform and transistor
level

buffer output waveform. I shift the V-t Tables in the IBIS model to
compensate the delay and the output waveforms are matched but this
occurs when the input signal has rising/falling times equal to the
rising/falling times used to extract the IBIS model, if I use a input
signal with rising/falling times lower than the rising/falling times
used to extract the V-t curves then the buffer implemented with the IBIS
model has again a delay.
   What happens?
   How can I understand this? How can I avoid this delay?
   Or this phenomenom is normal because the important thing is the edge
waveform (buffer switching behavior) and the delay obtained is not
relevant?
   Or the V-t curves obtained with specyfic rise/fall times are only
valid to simulate buffers with input signals with the same rise/fall
times ?

   Thanks.

   Regards.

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Received on Tue Oct 12 18:53:57 2004