It is my high-speed design. I would to know if anyone could help me about how to route differential pairs of a Gigabit Ethernet Interface. About PCB routing rules, from Ethernet controller to Ethernet connector. I designed a co-layer solution with Realtek RTL8100C (Fast Ethernet controller) and RTL8110SB (Gigabit Ethernet Controller). I donīt have the Ethernet Controller IBIS file (the Ethernet interface pins are not included on the IBIS supplied by Realtek). But, I took a SPICE model from Connector datasheet (pulse Jack). I work with Allegro SPB15.5 with SI tools. Trusting in your help, Raul Moreira HW & SI Engineer |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993Received on Wed Nov 16 06:16:58 2005
This archive was generated by hypermail 2.1.8 : Wed Nov 16 2005 - 06:20:45 PST