[IBIS-Users] R-Load

Hi,

I had this query as to why we need to model the buffers with R-load
as in most of the cases it is c-load w/without TL line is
driven by the buffer).

does it reflect on the TL impedence that it drives? (50ohm environment)

Also are there any reading material available in the web as to how the 
I/V and ramp/VT
data get used by the boardlevel simulator. If we have I/V and V/T 
mismatches due
to buffer transient behaviour how does the tool interpret this information.

Thanks
vinayak
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