[IBIS-Users] Verilog A templates for SSO enhancement of IBIS model

Hi All,

 

Does anyone is working on development of verilog-A templates for SSO
enhancement of IBIS model?  

 

I hope these verilog-A templates will be useful as BIRD's 95.6 (Power
Integrity Analysis using IBIS) and 97.2 (Gate Modulation Effect).

 

Thanks for your inputs.

 

Regards,

Venu


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