RE: [IBIS-Users] How to replace RLC package

From: Beal, Weston <weston.beal_at_.....>
Date: Thu Mar 23 2006 - 09:24:22 PST
Radovan,

This is precisely one of the objectives of the [external circuit] block in IBIS 4 so you surely can do what you propose in IBIS. The second step is to find an EDA vendor who supports the syntax that want to use.

The [Circuit Call] and [External Circuit] blocks are used together. [External Circuit] references a SPICE circuit file for the definition of the circuit and then [Circuit Call] instantiates and connects that circuit one or more times in the IBIS component. One thing to be careful of is that you don't make the SPICE circuit include too many pins. The simulator will most likely have to simulate all the PCB nets connected to one [circuit call] and this could quickly grow to an unmanageable simulation.

When you find your EDA vendor that supports this syntax, you should contact the technical marketing engineer or application engineer or customer support engineer for help in creating your first IBIS component. This first one can be confusing, but after you get the concept firm in your mind it's pretty easy, like learning logarithms.

Regards,
Weston

 
The content of this message is my personal opinion only and although I am an employee of Intel, the statements I make here in no way represent Intel's position on the issue, nor am I authorized to speak on behalf of Intel on this matter. 
-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Radovan.Vuletic@infineon.com
Sent: Thursday, March 23, 2006 8:15 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] How to replace RLC package

Hi experts,

once again (almost) the same question, but now other way around ...

Recently I am getting lot of pressure to figure out how (in which format) to generate reasonable package model for IBIS models of our components.

Possible solutions:
==============
1.) [Sparse Matrix] - contra: tools that generate [Sparse Matrix] models can't generate models for multidrop networks (i.e. one pin one the input, more than one pads on output), sloppy support from simulation tools
2.) ICM - contra: no available tool for automated extraction (and nobody wants to do it manually :-(((()
3.) Simple RLC parameters - contra: no information about cross-coupling RLC elements (coupling capacitances, mutual inductances, etc.)

Workaround: use HSpice model of package, but how to "connect" it with IBIS model?

IBIS 4.1 provides new keywords [External Circuit], [End External Circuit], [External Model], [End External Model] [Node Declarations], [End Node Declarations], [Circuit Call] and [End Circuit Call] to support multi-lingual models - nice! 
Main question:
Is there a possibility to replace package description in [Pin] section of [Component] with some [External Circuit] or [External Model] or [Node Declarations]?
So what I want to do is to replace:
[Pin]  signal_name   model_name    R_pin        L_pin       C_pin
|
A1     VDD           POWER          210m       4.07nH      0.27pF
A2     NF            NF_INPUT       168m       2.70nH      0.19pF
.
.
.
T8     VSS           GND            127m       1.45nH      0.23pF
T9     VSSQ          GND            151m       2.18nH      0.13pF

With a call to HSpice netlist

[Circuit Call]
Pointer to HSpice model of package
[End Circuit Call]

Or 

[External Circuit]
Pointer to HSpice model of package
[End External Circuit]

Allows IBIS 4.1 something like that - is IBIS 4.1 planed for something like that at all?

When  I take a look (please see below) on a Figure 1 provided in IBIS specs, I am not sure that it is possible.

| The placement of these keywords within the hierarchy of IBIS is shown in the 
| following diagram:
|
|
|   |-- [Component]
|   |   | ...
|   |   |-- [Node Declarations]
|   |   |-- [End Node Declarations]
|   |   | ...
|   |   | ...
|   |   |-- [Circuit Call]
|   |   |-- [End Circuit Call]
|   |   | ...
|   | ...
|   |-- [Model]
|   |   | ...
|   |   |-- [External Model]
|   |   |-- [End External Model]
|   |   | ...
|   | ...
|   |-- [External Circuit]
|   |-- [End External Circuit]
|   | ...

Has anybody some idea about it?

Many thanks for every answer!

Best regards / Mit freundlichen Grüßen / S po¹tovanjem
Radovan Vuletiæ

Infineon Technologies AG
MP PD PDE
MUC/10.2.236 AP 3
Am Campeon 1-12
D-85579 Neuebiberg

Phone:		+49 (0)89 234 20108
Fax (PC):	+49 (0)89 234 955 5305 

E-mail: radovan.vuletic@infineon.com

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Received on Thu Mar 23 09:24:55 2006

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