RE: [IBIS-Users] FW: C_comp calculation for high speed IOs

Ajay,

I prefer to use an AC simulation to look at C_comp. You can sweep
various DC bias points and frequencies if you want to make a 3D plot of
C_comp versus DC bias and frequency. The HSPICE syntax is below for
this method, where pad is the I/O node of the buffer. I suggest VDDQ/2
as the bias point of most interest, and you can decide which frequency
to use, maybe one close to the maximum clock frequency. You just need
to ensure that ODT is enabled to the right value for the DC operating
point (so if you need a clock signal in the model to toggle before ODT
turns on, you'll be in trouble and will need to use .IC statements to
ensure control lines are at the right state).

.AC lin 2 400MEG 667MEG sweep dcsweep 0.7125 0.7875 .0375

.measure ac incap find par('-1*ii(Vpad)/(hertz* 2 * 3.1415926)')
at=667000000hertz

Vpad pad 0 DC dcsweep AC 1

Regards,

Randy

Randy Wolff
SI Modeling Manager
Signal Integrity R&D Group
Micron Technology, Inc.
208-363-1764

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Mirmak, Michael
Sent: Wednesday, March 10, 2010 2:17 AM
To: ibis-users@eda.org
Cc: akap.31@gmail.com
Subject: [IBIS-Users] FW: C_comp calculation for high speed IOs

Forwarded on behalf of Ajay Kapoor...

From: ajay kapoor [mailto:akap.31@gmail.com]
Sent: Wednesday, March 10, 2010 4:34 PM
To: Mirmak, Michael
Subject: C_comp calculation for high speed IOs

[...]

I needed help on follwoing:
I am developing IBIS models for DDR3 IO with following condition that On
Die Termination is turned ON and DDR3 is recieving data.
Can you please suggest a method / setup to calculate accurate Ccomp
value for this model ?
 
Thanks in Advance
AK

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