Re: [IBIS-Users] Combined Pulldown and Pullup warnings when using parse 4.0

Bonnie:

Here are some ideas in your text, although seeing the actual model might
allow me to make specific comments.

Bob

Baker, Bonnie wrote:
> IBIS-users,
>
>
>
> I am responsible for creating models for my company?s precision mixed
> signal devices. I create these models through the IC spice simulations
> and I use the three corners for my simulation (power, voltage, process).
> Once I convert the spice data to IBIS I occasionally get these warnings
> from the 4.0 parse:
>
>
>
> WARNING - Combined Pulldown for Model: GPIO Typical data is non-monotonic
>
> WARNING - Combined Pulldown for Model: GPIO Minimum data is non-monotonic
>
> WARNING - Combined Pulldown for Model: GPIO Maximum data is non-monotonic
>
> WARNING - Combined Pullup for Model: GPIO Maximum data is non-monotonic
>
>
>
> When I view the data graphically, I am unable to see the point where
> this warning is generated. I assume that this warning is referring to
> the calculated summation of the pulldown (or pullup) data, ground clamp,
> and power clamp data.
>
>
>
> My questions are:
>
> 1. How do I identify the region(s) where this monotonicity problem
> is occurring?

The Notes messages might give an indication which table in non-monotonic
(e.g. it might be one or both of the clamps.)

Also, a line number or voltage value might point to where the non-monotonic
area occurs. Voltage values are relative to ground, so the Pullup and
Power Clamp table locations must be calculated.

>
> 2. What corrective action can I take to remove these warnings?

If it is just numerical noise, you can just remove some points. If
if is in the clamp region, you might just extrapolate the clamp data
if it folds back.

>
> 3. What impact will this monotonicity problem have on my customers
> as they use this IBIS model into their simulations?

It may depend on the extent, but in general it should be minor. But
theoretical situations can occur where the model does not converge to
a stable starting point.

>
> 4. Will this warning cause problems in some or all of the EDA
> platforms that simulate IBIS circuits?

Probably not, but it depends on the actual waveforms and how bad the
non-monotonic data is and in what region.

>
>
>
> Another issue with these warnings is, I sometimes have a ?good? file
> without errors but when I go back to the buffers in the file and correct
> the I-V/V-t mismatches these types of warnings are generated. Once
> again, graphical inspection does not help in identifying the point where
> these warning are generated . My questions for this issue are:
>
> 1. Do I go back to my original ?good? file and discard the I-V/V-t
> corrections?

If you correct the V-T mismatches by re-scaling the V-T data, the
I-V warnings should not occur.

>
> 2. How do I identify the region(s) where this monotonicity problem
> is occurring?

Again, look at the Notes for guidance

>
> 3. What corrective action can I take to remove these warnings?
>

Smooth out minor numerical noise problems, and probably extrolate
data that is in the clamp regions.

>
>
>
>
>
> Best Regards,
>
>
>
> Bonnie Baker
>
> Texas Instruments, Tucson
>
>
>
>
>
>
>
>
> --
> This message has been scanned for viruses and
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-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com
Teraspeed is a registered service mark of Teraspeed Consulting Group LLC
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This message has been scanned for viruses and
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