Date: Tue May 10 2011 - 10:37:56 PDT
Ray,
I haven't simulated DDR4 myself, but I have similar experience. I would
use a w-element with a lumped C to represent the package via, pad, and
solder ball. Try 25 um line width, 60 um edge-to-edge spacing, Er = 3.3,
and tand = 0.02. That should get you in the ball park.
I've been using s-parameter models for circuit board vias for some years
now.
Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901
From: Ray Anderson <ray.anderson@xilinx.com>
To: ibis-users <ibis-users@eda.org>
Cc: Ray Anderson <raya@xilinx.com>
Date: 05/10/2011 12:18 PM
Subject: [IBIS-Users] DDR4 simulations using IBIS models
Sent by: owner-ibis-users@eda.org
For relatively low bandwidth signals (say < 1GHz) IBIS .pkg style RLC
package models are an adequate solution. As we move into the realm of DDR4
where the bitrate is say 4 GB/s and the risetime is on the order of 70psec
I am wondering what sort of package models IBIS users tend to use these
days.
A 70psec ristime equates to a knee frequency of about 5.7 GHz. For good
signal fidelity the package model should be accurate up to at least 3 times
that frequency (and preferably 5 times).
Looking at the options available it is looking like s-parameter models may
be the only variety that is up to the task. The problem with those from a
user’s perspective is that the simulation speed is quite slow compared to
RLC based models. From the model makers perspective, it is impractical to
do a “full package” s-parameter extraction to provide separate models for
each net in large packages. It also appears that in IBIS 5.0 there is no
good method to automatically include the proper s-parameter model (as one
can do in current tools by just selecting the proper pin name or netname to
pull in the correct RLC parasitic).
If IBIS BIRD 125 is adopted allowing IBIS-ISS available for package
modeling it seems that will provide a mechanism for the inclusion of
s-parameter package models.
Until the enhancements described in BIRD125 become reality what is current
solution most users are adopting?
Ray Anderson
Xilinx Inc.
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be
proprietary, privileged or copyrighted under applicable law. If you are not
the intended recipient, do not read, copy, or forward this email message or
any attachments. Delete this email message and any attachments immediately.
--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
-- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
--------------------------------------------------------------------
|For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org
|with the appropriate command message(s) in the body:
|
| help
| subscribe ibis <optional e-mail address, if different>
| subscribe ibis-users <optional e-mail address, if different>
| unsubscribe ibis <optional e-mail address, if different>
| unsubscribe ibis-users <optional e-mail address, if different>
|
|or e-mail a request to ibis-request@eda-stds.org.
|
|IBIS reflector archives exist under:
|
| http://www.eda-stds.org/pub/ibis/email_archive/ Recent
| http://www.eda-stds.org/pub/ibis/users_archive/ Recent
| http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993
