Re: ECL logic

Greetings Fellow IBISans --

     I like to add a little comment to Kumar's observation
(from Siuki Chan's previous email) that "The output current is
always a function of both rail voltages"

     If one is refering to the VEE rail then yes, strictly
speaking, the output voltage does vary with VEE, but the
sensitivity is on the order of mV/V. Both the VBB reference and
the constant current sink are designed to be insensitive to
VEE changes (at least in all modern ECL logic families). I do
agree that for completeness sake when defining the conditions
for MIN and MAX we state at what VEE the measurments are taken.
     (As an aside, ECL vendors usually publish both dVout/dVEE and
dVout/dTEMP specs for their logic families. This is a perfect
example illustrating Arpad Muranyi's concept of supplying a
V-I curve and then using scalling factors to adjust the output
for tempurature or other variations.)

        Sincerely,
        Stephen Peters
        Intel Corp.

     
Received on Wed Sep 15 09:06:55 1993