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Hi IBIS folks,
I am not sure what the status of the pending BIRD17 is right now. (Is it
dead or alive)? However, along similar lines, I have an of observation
regarding the 100 point limit in ver1.1. I would like to have everyone's
(especially SPICE people's) opinion on this one.
Ver1.1 limits the number of voltage points to 100 in any V/I curve and
requires that there should be no NAs in the first and last position in the
current tables. The intent of the first part of this rule was to satisfy
the 100 data pair limit of the PWL sources in SPICE.
However, now that I am working on an automated "Best 100 points" algorythm,
I realized that the typ min max curves will need different data point
distribution with respect to the voltage axis. I can fill in the gaps with
NAs in the current columns, but the 100 VOLTAGE point limit severly
restricts the total number of points in the individual current columns.
Since the typ min and max tables use three individual PWL sources in SPICE
anyway, it would make a lot more sense to reword the rule to say the
following:
"Each V/I curve must have at least 2, but not more than 100 CURRENT points
and any number of NAs can be used as long as they are not the first and last
data points."
According to this new statement we could do the followings (in this example
I pretended as if the maximum current points would be limited 10):
[Pulldown]
| Voltage I(typ) I(min) I(max)
|
-5.0V -38.0m -34.0m -45.0m
-4.0V -37.0m NA NA
-3.0V -36.0m NA NA
-2.0V -35.0m NA NA
-1.0V -34.0m NA NA
-0.9V -33.0m NA NA
-0.8V -32.0m NA NA
-0.7V -31.0m NA NA
-0.6V -30.0m NA NA
0.0V NA 0.0m NA
0.5V NA 10.0m NA
1.0V NA 11.0m NA
1.5V NA 12.0m NA
2.0V NA 13.0m NA
2.5V NA 14.0m NA
3.0V NA 15.0m NA
3.5V NA 16.0m NA
4.0V NA NA 30.0m
4.5V NA NA 31.0m
5.0V NA NA 32.0m
5.5V NA NA 33.0m
6.0V NA NA 34.0m
6.5V NA NA 35.0m
7.0V NA NA 36.0m
7.5V NA NA 37.0m
10.0V 45.0m 40.0m 49.0m
|
Even though the number of voltage points are 26 in this example, each case
(typ min max) has no more than 10 points (10 in the example, 100 in real
life), which satisfies the SPICE PWL source requirements, but still allows
the best 100 for each individual case. I would have had a very hard time if
I had to do this extreme example under the old rules (with 10 voltage
points).
I would very much like to see this change. Does anyone agree or disagree?
Can we turn this into a BIRD?
Sincerely
Arpad Muranyi
Intel Corporation
Received on Wed Aug 3 14:41:10 1994
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