Stephen:
For compliance with all versions of IBIS, the tables need to extend (even
by extrapolation) to the full -5V to 10V range. I agree, you will never
see the full range in practice. Since open collector versions of TTL
could swing from Vcc (say 5V) to nearly 0V, I would not want to complicate the
range specification at this point. (I personally favor not forcing the
tables to be at the specified IBIS limits, but that is a separate issue
and not the IBIS position.)
With some simulators, there are some subtle behavior effects which could give
significantly different simulations for what appear to be negligible IBIS
differences. If for TTL the [Pullup] table has an I = 0 point at say 3.5V
(actual voltage, not table voltage), and a [Pulldown] I = 0 point at say .2V,
then the [Ramp] rise and fall transitions can extend over a 3.3V range with
some simulators. However, if the [Pullup] table has a current of I = -1e-6
at 3.5V and I = 0 at 5V, then the [Ramp] rise and fall transitions can
extend over a 4.8V range (some of which is in the 3.5V to 5V high Z region).
This can cause a long time-constant dribble up in the low to high transition
into a high resistance load. It may also give a different effective ramp rate.
Related to this is the extraction of the dV/dt_f ramp rates with 50 ohms to
Vcc = 5V versus 50 ohms to say Vcc - 1.5 = 3.5V. Some Spice simulations give
much slower ramp rates under the first condition than under the second,
more realistic situaton which does not force a transition through the
high impedance region. So, with TTL there can be some practical considerations
which do not apply for CMOS Logic. Along with the range question you raise,
IBIS does not address these concerns.
Bob Ross,
Interconnectix, Inc.
> Hello Bob, Syed:
> You know, Syed's question brings up an interesting point. Suppose the
> VCC of a device is at +5V but the output is TTL and the maximum swing
> is, say 3.5V. Should the output be characterises from -3.5 to 7.0v
> (the maximum voltage range that the output would ever realistically see)
> or does one still have to do the -5 to +10v range?
> Best Regards,
> Stephen Peters
> Intel Corp.
> Syed:
> Here are my views on your questions:
> (1) The Voltage table can be presented in any order: -ve to +ve or +ve to -ve.
> (2) The table itself must go to at least the specified limits. It is
> permissible to do the measurements over a reasonable range and then extrapolate
> to the end points. For example, you man not want to measure below -2V, but you
> still need to provide at least one extrapolated data point out to -5V if Vcc
> is 5V.
> Bob Ross,
> Interconnectix, Inc.
> > Hi fellow gurus:
> > Got two questions about the V/I table.
> > 1) Does the Voltage table need to ramp down from a -ve number to a +ve or can it
> > be from +ve to -ve number as well ?
> > Ex: For [Pulldown] the Voltage table goes from -5.0V to +10.0V
> > 2) For most of the V/I table, IBIS shows that the voltage range should go from
> > +10V to -5V. Problem is, there are devices whose I/O structure cannot handle
> > swings that large. In that case, since we should not test a device beyond
> > it's Absolute Recommended Operating(ABS Max) range, is it O.K NOT to swing
> > the I/O all the way to +10 to -5V ???
> > Regards,
> > Syed huq
> > National Semiconductor
Received on Wed Jul 20 18:32:46 1994
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