Hello Bob, and Fellow IBISans --
Regarding BIRD 9.1, how do we specify what pins in a resistor package
are the 'common' or associated pins? I'm thinking that when a
simulator goes to parse a resistor model and put it into the target
netlist the simulator needs to know the pins on the package relate to
the resistors. Let me illustrate.
Suppose we have a collection of pullup resistors in a 10 pin SIP as
follows:
1
|
|
|------------------------
| | | | | | | | |
R R R R R R R R R
R R R R R R R R R
R R R R R R R R R
| | | | | | | | |
| | | | | | | | |
2 3 4 5 6 7 8 9 10
How is one supposed to designate that pin 1 is the common pin? Would
doing something like this work?
[Pin] signal_name model_name
1 common POWER
2 R1 res1
3 R2 res1
. . .
. . .
The same question applies to a thevinen type resistor package. Does
listing the two common pins as POWER and GND accomplish what we need?
There is also a third case: straight thru resistor in a DIP or SIP
pack.
____________
| |
1-----|---RRRR---|----14
2-----|---RRRR---|----13
3-----|---RRRR---|----12
.
.
.
7-----|---RRRR---|----8
|__________|
How is the model going to tell the simulator that pin 7 is associated
with pin 8, for example? To me it seems that, based on a keyword or
model type, both the IBIS model and simulator have to assume some
kind of topology for the resistor connections. What do you think?
Best Regards,
Stephen Peters
Intel Corp.
Received on Mon Mar 14 17:42:21 1994
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