Hello All:
I've been following the exchange between Malan and Arpad
regarding the "alternate model selection" process and I have
an observation. With the [Model Selection] keyword (and the
enhnacments suggested by Malan) the focus is on manipulating
a pre-determined group of buffers AS A GROUP. As bird 30 states:
"The operation of this selection mechanism implies that a
group of pins which use the same programmable buffer (i.e.
model selector name) will be switched together from one [Model]
to another."
It seems that the intent is for the simulation tool to provide
a diaglog box that says "for buffer group XYZ pick buffer A, B or C".
This is OK if all one wants to do is set the buffer type for each
group of pins, but suppose one wants to overide the default selection on
a pin by pin basis? I am thinking about FPGA's, complex PLD's,
etc. where all the I/O pins have the same buffer choices, but the
individual pins are not put into functional 'groups' until the
chips is designed. The user is most likly going to select a default,
then override this default as needed -- pin by pin. We should keep
this usage model in mind as we debate this Bird.
Also, regarding model and model selector names....as you can
see from the dialog box example above, it greatly behoves the
model maker to pick intellagable names. I would hate to see a
question like "For buffer group 'Progbuffer1' pick buffer
ABCD123456789ABCDE0, ABCD123456789ABCDE2, ABCD123456789ABCDE3 or
ABCD123456789ABCDE4". I don't quite know how one enforces something
like 'good nameing' in a specification, but at least we can make
clear to the model maker how the information may be used.
Regards,
Stephen Peters
Intel Corp.
Received on Wed Aug 23 13:41:01 1995
This archive was generated by hypermail 2.1.8 : Fri Jun 03 2011 - 09:52:28 PDT