Bob,
One non-monotonic model that I have seen, was the result of the output buffer being
tri-stated during its transition. The VI curves for the output device looked normal
and I was tempted to use them in an IBIS model, taking a guess at the "real"
rise/fall times. The vendor however assured me that the device actually behaved
this way and that with typical loading, the transition would become monotonic
(which it did).
I suppose that this would not be too difficult to model if the timing and duration
of the tri-state condition were known. However, I'm sure that there are other
reasons for non-monotonic behavior.
Anyone who has worked with power FETs would assure us that non-monotonic edges are
common due to the Miller effect, when switching high voltages or when switching
highly inductive loads. I'm not sure where I would start to try to model this type
of behavior in an IBIS model. Maybe this type on non-monotonicity is only a problem
with power circuits and we don't need to worry about it.
Does anyone else have an example of a non-monotonic output buffer?
Fred Vance
Begin forwarded message:
Date: Thu, 31 Aug 95 17:59 PDT
From: bob@icx.com ( Bob Ross)
To: ibis@vhdl.org
Subject: On Non-Monotonic Drivers
To All:
Based on the discussions and clarifications, I would conclude that
(1) IBIS Version 2.1 provides a format which can legally characterize the
IV curves. It also could characterize resulting waveforms for given
test loads, although I have not seen details on the dynamic switching
characteristics and possible artifacts.
(2) From what has been stated, some simulation approaches would not have
have difficulty with the VI non-monotonicity.
The real concerns are:
(1) Different simulators may take different approaches including filtering
the data to produce significantly different simulations. (However, if
we do not have access to source data, we cannot validate that any of
the approaches will produce an acceptable simulation.)
(2) There exists a well-defined feedback reason for producing this type
of non-monotonicity. So the correct simulation MAY depend on knowing
exactly the mechanism. The simulators may have to include the mechanism,
and IBIS may need to be extended to characterize it by its parameters.
The questions I have are:
(1) Is there a way to accurately characterize the mechanism without revealing
the proprietary details from a black box point of view? What are its
critical parameters?
(2) Because there exists a negative resistance region, are there any load
constraints associated with the technology (e.g., an impedance range)?
(3) Could a simplified Spice test case be revealed which illustrates
the effect, and from which simulation approaches could be checked?
Bob Ross,
Interconnectix, Inc.
Received on Thu Aug 31 19:13:34 1995
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