This is reply to a question I asked of Stephen Peters of Intel. Like
Stephen suggested it may
be of general interest.
Hello Kumar:
Good question. Open drain/collector buss do have some advantages:
1. In the old days before 1ns edge rates they allowed one to
do logic functions (wire-or or wire-and) without the
delay of an actual logic gate.
2. They allow multi-party operation and bus contention on signals.
2. In a dense ASIC they save I/O buffer size because now there
is no pullup device. This also saves on suppling VCC power to
the I/0 ring.
3. If the pullup resister is selected to match the network impedence
you can terminate the net quite nicly (This is why designing with
ECL is so nice -- you have to work NOT to have a terminated net).
Adjusting VTT allows for
reduced signal swing (with a pullup device you go from gnd to VCC).
Of course, the shape of the rising edge is now controlled by
by the network characteristics and not an active pullup xsistor
on the output.
There are probably other advantages as well. This might be a good question
for the IBIS reflector (or the SI reflector -- I assume you are on that?)
Stephen
Stephen:
I have a general question for you regarding open drain or any open devices.
Under what circumstances you use such devices and what are their advantages?
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Received on Tue Jan 17 06:42:32 1995
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