Re: Re[2]: EGG Half Dozen

From: C. Kumar <cpk@cadence.com>
Date: Wed Sep 20 1995 - 11:43:08 PDT

I do not see we need to add anything special in IBIS to detect whether is curve is TTL or CMOS. The VT curves in 2.1 provides the mechanism to specify a non ideal transient behavior
= Kumar
Cadence design System
>
>
> Text item:
>
> Since noone responded to this EMAIL I sent quite a while ago, I suspect that it
> might have gotten lost, so I am resending it again. Is this automated detection
> method acceptable, or are there cases when it would fail?
>
> Arpad
> ================================================================================
> Jon,
>
> I have an idea that might do the thing without an extra keyword. (I didn't
> spend much time on this, though, so I am not sure if this is fool proof).
>
> The I-V curves of bipolar pulldown structures usually cross the voltage axis
> above 0 volt, in other words, zero current is at approximately 0.15 V on those
> I-V curves. On the other hand, the I-V curves of CMOS pulldowns would go
> through the origin, since the channel behaves more like a voltage controlled
> resistor (i.e. no voltage, no current). If the I-V curve in an IBIS file is
> accurate enough to detect this difference, I think you can just look for the
> voltage at zero current, and if it is not zero, you could assume a bipolar
> device.
>
> Do you think this will work?
>
> Arpad
> ===============================================================================
> More Argument on EGG Half Dozen.
>
> Hopefully by now people have the hardcopy in hand and can look at
> the two IV curve groups. If we have no argument on how they look
> (at least, in general appearance) then my problem is this:
>
> As the "control" voltage changes on the CMOS gate only the IV curve
> strength changes. The zero millamp point stays constant (at ~VCC) this
> makes sense as all we are doing is making the CMOS gate more resistive.
>
> The TTL gate, however, changes its zero milliamp point, it being a totem
> pole arrangement and all.
>
> The point is, at risetime/2, what is the proper thevinin equivalent for the
> driver? You have to know if it is CMOS or TTL. If there is a fool proof way
> to determine this form the IV curve alone, they we are done, else I would
> like a new (optional?) KEYWORD.
>
> regards,
> jon
>
> (I hope I got this HALF-DOZEN joke out before bob or will).
>
> (If you still need hardcopy, let me know. Won't it be nice when I can just
> post HTML to a WWW EGG discussion page?).
>
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> Subject: EGG Half Dozen
> To: ibis@vhdl.org
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> From: jonp@qdt.com (Jon Powell)
> Date: Thu, 10 Aug 95 10:09:52 PDT
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> Subject: Re: EGG Half Dozen
> To: jonp@qdt.com, ibis@vhdl.org
> Message-Id: <Thu, 17 Aug 95 16:56:34 PDT_2@ccm.hf.intel.com>
> From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
> Date: Thu, 17 Aug 95 16:46:00 PDT
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Received on Wed Sep 20 12:00:03 1995

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