Re: Questions of Polarity and Enable

Text item:

Stephen, and Zheng,

If the use of the Polarity (and other) sub-parameter doesn't make sense, don't
use it. It is not a required sub-parameter.

Arpad
===============================================================================

On Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:

>Hi, Ibis folks:
>
>Can anyone tell me what the sub-param Polarity and Enable of
>keyword [Model] really means? Is Polarity used only on diff
>pins? Is Enable used only on tri-state pins? How can I decide
>the Polarity and Enable of an input or output pin?
>
>I can't find such detail information from IBIS2.1 Specification,
>can anyone give me some advices, or tell me where i can find
>the answer?
>
>Thanks a lot,
>
>-Zheng Shi
> zheng@symmetry.com
> Los Altos, CA.

     I belive the original intent was to support SSI logic components
(74OO series TTL and the like) by allowing the user to include
information on the outputs' logic operation. For example, the model provider
could specify if the the path from input to output was inverting or
non-inverting or if the enable on a tri-state output pin was high or
low. However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
etc.) these parameters don't seem to make much sense (to me, anyway). Unless
you were modeling an SSI component where this made since, I would
just default them to positive polarity and Active_high.

  Ibis old-timmers, any other comments?

               Best Regards,
               Stephen Peters
               Intel Corp.

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

From: Stephen Peters <sjpeters@ichips.intel.com>
Date: Fri, 06 Dec 1996 14:31:33 -0800
Subject: Questions of Polarity and Enable
To: ibis@vhdl.org, ibis-users@vhdl.org
Message-Id: <199612062229.OAA11827@ichips.intel.com>
Received: from ichips.intel.com by ichips.intel.com (8.7.4/jIII)
     id OAA11827; Fri, 6 Dec 1996 14:29:50 -0800 (PST)
Received: from ichips.intel.com (ichips.intel.com [134.134.50.200]) by ormail.in
tel.com (8.8.4/8.7.3) with ESMTP id OAA27682; Fri, 6 Dec 1996 14:31:30 -0800 (PS
T)
Received: from ormail.intel.com (ormail.intel.com [134.134.248.3]) by vhdl.vhdl.
org (8.7.3/8.7.3) with ESMTP id OAA12385; Fri, 6 Dec 1996 14:42:43 -0800 (PST)
Received: from vhdl.vhdl.org (vhdl.vhdl.org [198.31.14.3]) by ormail.intel.com (
8.8.4/8.7.3) with ESMTP id OAA28257; Fri, 6 Dec 1996 14:34:13 -0800 (PST)
Received: from ormail.intel.com (ormail.intel.com [134.134.248.3]) by relay.jf.i
ntel.com (8.8.2/8.7.3) with ESMTP id OAA17422; Fri, 6 Dec 1996 14:34:14 -0800 (P
ST)
Return-Path: owner-ibis@vhdl.vhdl.org
Received on Fri Dec 6 16:41:52 1996