Happy IBIS-campers,
Here is the agenda for the upcoming Summit. There may be some minor last
minute changes as we approach the actual date, but this should be a good
guide to the day's events. I look forward to seeing the "old-timers"
again, and meeting many of you for the first time. This should be an
excellent meeting, representing a good cross-section of users and producers
of models and simulators, and a good cross-section of technical topics.
There is much more that could be presented in such a session, and we will
undoubtedly wish we had more time. But I don't think anyone will be
disappointed with the time they spend at this session.
For those who are attending, please send an RSVP to Syed Huq
(huq@rockie.nsc.com) so he has an idea of how many people will be attending
so he can order appropriate amounts of food. If for some reason you don't
RSVP, however (like last minute plans changing) and want to come, please
join us anyway.
For those who are presenting, bring a clean copy of your presentation to
give to Syed at the beginning of the session so he can have copies made.
Or, bring lots of extra copies so participants can take copies home with
them.
Please arrive promptly, as we have a very full schedule.
See you in San Jose!
Will Hobbs
Chair, EIA IBIS Open Forum and
Server Component SV Manager
Intel Corp.
==========================================================================
IBIS Open Forum Summit Meeting Agenda
(Hosted by National Semiconductor)
1/29/96
8:00 AM - 5:00 PM
Westin Hotel, Lafayette & San Thomas Rooms
5101 Great America Parkway, Santa Clara, CA
Phone: (408)986-0700
8:00 Check-in, Intros, Announcements Hobbs
- Introductions
- Miscellany/announcements, minutes review
- Dinner reservations (Sticks Restaurant at Westin Hotel)
- Opens for additional topics
8:20 Administrative Stuff
- Web page improvements, etc. Huq
- `96 Membership, etc. Hobbs
- DAC Standards booth participation
- IBIS_CHK bug report process Powell
8:50 Brief Overview and History of IBIS Hobbs
9:10 National and the IBIS Experience Huq
9:35 IBIS at Intel: Buffer Architecture to Customer Models Peters
10:00 - 10:15 Break
10:15 Model Provider Experiences, The TI Experience Jandhyala
10:40 Using IBIS Models in System Design Moxley
11:05 Modeling Lossy Transmission Lines Kumar
11:30 Egg 8: Modeling Packages with Physical Descriptions Crisafulli
Noon - 1:00 Lunch
1:00 BIRDs 28.3, 32: Modeling Packages with Elec. Descr. Peters, Kumar
1:30 BIRD 31: Connector Modeling Ross
1:50 Stored Charge Modeling, Diode Delay Discussion Ross, Powell
2:25 Egg 6: Detecting CMOS versus TTL Powell
2:40 Double Counting and Other Model Generation Issues Muranyi
3:00 - 3:15 Break
3:15 RAIL, Rules Augmented Interconnect Layout Spec Telian
3:55 Useful Non-Simulation Data Inclusion Powell
4:15 Bus Hold Circuits and EIA JEDEC JC40 Wenniger
4:30 Open Discussion: IBIS 3.0 Possibilities, Wish Lists Hobbs
4:55 Wrap-Up, Next Meeting Plans
5:00 End of Conference
6:00 Dinner to Celebrate ANSI EIA-656 adoption: Sticks Restaurant
at Westin Hotel
=====================================================================
Received on Tue Jan 23 18:07:24 1996
This archive was generated by hypermail 2.1.8 : Fri Jun 03 2011 - 09:52:29 PDT