Hello Fellow IBISians:
I think I've run across a limitation describing packages
using sections. Take for example the following BGA (ball
grid array) package construction
bondwire trace "plating stub"
driver @@@@@--ZZZZZZZZZZZZZZZZZZZ------ZZZZZZ
0
0
ball
Looking from the driver, the ball (the 'pin') is really in
parellel with the plating stub - and our current description assumes
that all elements are in series, with the last element being the
package to board connection. That is clearly not the case.
Even if one assumes that the plating stub could be modeled as a
capacitor as follows:
bondwire trace ball and plating stub
A1 /Len=0 L=2n / Len=1.0 L=.. C=../ Len=0 L=xn C=yp /
the way the spec reads it could come out as either
bondwire trace pin
driver @@@@@--ZZZZZZZZZZZZZZZZZZZ------@@@@@@-- pin
|
--- plating stub cap
---
|
or
bondwire trace pin
driver @@@@@--ZZZZZZZZZZZZZZZZZZZ------@@@@@@-- pin
|
---
--- plating stub cap
|
Is their some objection to explicitly stating that the order of C and L
in the pin description specify the actual 'nodal' order of components in a
section? Also, any idea how to describe the plating stub when the
'stub' length is as long as the trace itself and a cap model is not
appropriate? Kumar and I will be discussing this at the face to face Monday
Best Regards,
Stephen Peters
Intel Corp.
Received on Fri Jan 26 16:01:03 1996
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