Ringback in Universal Signaling Buffers

It's not correct to say all the energy will ringback. Remember the PMOS driver
stage remains on and sinks current into the 3.3V bus during overshoot. It will
sink even more current than the V/I curves predict for the PMOS driver with a given
drain-source voltage because the gate-source voltage is higher when the pin voltage
exceeds the 3.3V supply level.

Ben andresen@asic.sc.ti.com

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>From owner-ibis@vhdl.vhdl.org Thu Feb 29 09:31:02 1996
To: si-list@silab.eng.sun.com, ibis@vhdl.org
Cc: ingraham@wrksys.ENET.dec.com
Subject: Re[n]: Wanted...PCI bus 3V driver/receiver models

Scott McMorrow wrote:

> In a 5 volt signaling environment with 3.3V voltage level devices, you may want
> to be careful about low to high switching of the 3.3 V devices on the bus. 5
> volt devices will overshoot far enough to turn on the high clamp diodes,
> supressing the ringback component to reasonable levels. But with 3.3 volt
> drivers, all of the overshoot energy will ringback and can enter the threshold
> region of receivers on the PCI bus. With small geometry, fast devices, there
> can be an extreme amount of overshoot.

This is indeed a very good point. It's quite true. You can get some
rather long bus delays (settling times) which exceed the 10ns PCI spec.

I'm glad others out there are recognizing this problem.

Regards,
Andy

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Received on Wed Mar 6 07:43:43 1996