Hello Fellow IBISains:
Over the past couple of weeks the packaging subcommittee
has been working on a way to describe connectors and PCB board
traces using a simple, non-coupled transmission line description.
Our proposal is based on Bird36 (which itself is an extension of the
format found in the IC packaging description Bird 37.3), and while
it is not complete (it does not yet comprehend coupling) we are at the
point where we would like feedback from the wider IBIS community.
Please look over the attached proposal -- the packaging subcommittee
would like to discuss it at the upcomming teleconference.
Again, I'd like to emphasis that, while the propsal is in the form of a
bird, this is not intended as the final proposal.
The packaging committee feels that any proposal should include a method
for describing connector coupling before acceptance as a Bird.
Best Regards,
Stephen Peters
Intel Corp.
=============================================================================
Buffer Issue Resolution Document (BIRD)
BIRD ID#: working proposal
ISSUE TITLE: Electric Descriptions of Boards and Connectors
REQUESTER: Stephen Peters, Hank Herrmann
DATE SUBMITTED: June 23, 1996, 11/4/96
DATE ACCEPTED BY IBIS OPEN FORUM: Pending
****************************************************************************
****************************************************************************
STATEMENT OF THE ISSUE: There is a need to describe SIMM modules and related
type components that consist of one or more ICs mounted on a PCB board that
connects them to a system thru a set of pins. The following BIRD proposes a
new type of file called .eid (Electrical Interconnect Description) that
addresses this need. A .eid file can also be used to describe connectors
and
sockets.
******************************************************************************
STATEMENT OF THE RESOLVED SPECIFICATIONS: The following text is placed
in the specification after the .pkg file description and before the
[End] keyword description.
==================== ELECTRICAL INTERCONNECT DESCRIPTION ====================
An Interconnect Level Component is defined as a part that connects
one or more IC packages to another part or board thru a set of user visible
pins. For example, a SIMM module is an interconnect level component in that
it connects several DRAM packages to a PCB thru an edge connector. To provide
a simple electrical description of the connection between the pins of the
interconnect level component and the IC packages, an electrical interconnect
description file (a .eid file) is defined. The .eid file is also used to
describe the electrical characteristics of connectors and sockets.
What is, and is not, included in an Electrical Interconnect Description
is defined by its boundaries. For the definition of the boundaries, see the
Description section under the [Path Description] Keyword.
Usage Rules:
A .eid file is intended to be a stand alone file, not associated with any
.ibs file. Interconnect level component descriptions are stored in a file
whose name looks like <filename>.eid, where <filename> must conform to the
naming rules given in the general syntax section of this specification. The
.eid extension is mandatory.
Contents:
A .eid file is structured similar to a standard IBIS file. It must
contain the following keywords, as defined in the IBIS specification:
[IBIS Ver], [File name], [File rev], and [End]. It may also contain the
following optional keywords: [Comment char], [Date], [Source], [Notes],
[Disclaimer] and [Copyright]. The actual interconnect level component
description is contained between the keywords [Begin Electrical Description]
and [End Electrical Description], and includes the keywords listed below.
[Begin Electrical Description]
[Manufacturer]
[Application Info]
[Number of Pins] note 1
[Number of Pairs] note 1
[Pin List] note 2
[Pair List] note 2
[Path Description]
[Coupled Path Model] note 3
[Reference Designator Map]
[Model Data] note 3
[Resistance Matrix] note 3
[Inductance Matrix] note 3
[Capacitance Matrix] note 3
[Bandwidth] note 3
[Row] note 3
[End Model Data] note 3
[End Electrical Description]
(Note 1) Either the [Number of Pins] or [Number of Pairs] keyword must be
used but not both.
(Note 2) Either the [Pin List] or [Pair List] keyword must be used but not
both. [Pin List] is used only when the [Number of Pins] keyword
has been used and [Pair List] is used only when the [Number of Pairs]
keyword has been used.
(Note 3) The indicated keywords are reserved for future use in coupled models.
More than one [Begin Electrical Description]/[End Electrical Description]
keyword pair is allowed in a .eid file.
|=============================================================================
| Keyword: [Begin Electrical Description]
| Required: Yes
|Description: Marks the beginning of an Electrical Interconnect description.
|Usage Rules: The keyword is followed by the name of the interconnect level
| component. If the .eid file contains more than one [Begin
| Electrical Description] keyword, then each name must be
unique.
| The length of the component name must not exceed 40 characters
| in length, and blank characters are allowed. For every
| [Begin Electrical Description] keyword there must be a
| matching [End Electrical Description] keyword.
|-----------------------------------------------------------------------------
[Begin Electrical Description] 16Meg X 8 Simm Module
|
|=============================================================================
| Keyword: [Manufacturer]
| Required: Yes
|Description: Declares the manufacturer of the part(s) that use this .eid
| file.
|Usage Rules: Following the keyword is the manufacturers name. It must not
| exceed 40 characters, and can include blank characters. Each
| manufacturer must use a consistent name in all .eid files.
|----------------------------------------------------------------------------
[Manufacturer] Quality SIMM Corp.
|
|=============================================================================
| Keyword: [Application Info]
| Required: Yes, if any subparameters need to be specified.
|Description: This keyword provides general model application information.
|Sub-params: Min_edge_time, Cpad1, Cpad2
|Usage Rules: This keyword is followed by one to three listed subparameters.
| All three subparameters are optional. Subparameters are
| followed by an equals sign (=); whitespace around the equals
| sign is optional.
|
| The Min_edge_time subparameter is used to specify the minimum
| edge time of a signal for which an interconnect model is
| considered accurate. This value is based on the smallest
| physical feature that is modeled in the electrical description.
| Note that a simulator may choose to produce a warning message
| if a signal with a faster edge enters the model. Simulators
| should also use this subparameter in determining how to
| model a section with non-zero length.
|
| The Min_edge_time subparameter is a single numeric argument
| specifying the 20% to 80% edge time of the fastest pulse the
| model will accurately pass. This value will be the minimum
| value where the measured signal line impedance is within 10%
| of the simulated impedance. The point at which impedance
| deviations exceed 10% is where the model needs more structural
| detail. This is not the same as dividing a long section into
| stages as is required when using lumped values in SPICE. Long
| uniform sections should be specified as distributed sections.
| (Len <> 0 under [Path Description]) Measured line impedance is
| the impedance plot of the part's connection path taken by a
| Time Domain Reflectometer (TDR) with the edge time indicated by
| the Min_edge_time subparameter. The simulated impedance is the
| ratio of the dynamic model input voltage to input current with
| the same source waveform and the same configuration as the test.
| The usual configuration is to ground all appropriate lines and
| use source and load impedances of 50 ohms.
|
| The Cpad1 subparameter defines the default pad capacitances
| for all circuit board edge pads or all pins on the first side
| of a connector model. Cpad2 is the default pad capacitance on
| the second side of a connector. The first and second sides
| refer to the order as used in the pin-pairs of the [Pin List]
| keyword. If either is omitted, the default value is zero pF.
| Do not omit Cpad1 (set it equal to zero) if Cpad2 is needed.
| In all cases the simulator may override the listed or default
| value with values extracted from the actual pad dimensions
| provided in a physical board description.
|
|---------------------------------------------------------------------------
|
| AN EXAMPLE CONNECTOR DESCRIPTION
|
Min_edge_time = 1.5n
Cpad1 = 0.5p
Cpad2 = 1.0p
|
| AN EXAMPLE PATH ON A SIMM MODULE
|
Min_edge_time = 1.0n
Cpad1 = 1.5p
|
| ANOTHER EXAMPLE PATH ON A SIMM MODULE
|
Min_edge_time = 1.5n
|
|=============================================================================
| Keyword: [Number of Pins]
| Required: Yes, if the .eid file describes a circuit board, an unmated
| connector or similar structure. This keyword must not be
| used if the [Number of Pairs] keyword is used.
|Description: Tells the parser the number of pins to expect. Pins are any
| externally accessible electrical connection to the part.
|Usage Rules: The field must be a positive decimal integer.
| Note: The simulator must not limit the Number of Pins to any
| value less than 1,000.
|----------------------------------------------------------------------------
[Number of Pins] 128
|
|============================================================================
| Keyword: [Number of Pairs]
| Required: Yes, if the .eid file describes a mated connector, socket or
| other similar interconnection structure. This keyword must not
| be used if the [Number of Pins] keyword is used.
|Description: Tells the parser the number of pairs to expect. Pairs are
| simply the number of conductive paths in an interconnection.
| Pairs are necessary since each path has at least two external
| pins; one on each side of the interconnection device.
|Usage Rules: The field must be a positive decimal integer.
| Note: The simulator must not limit the Number of pin-pairs to
| any value less than 1,000.
|-----------------------------------------------------------------------------
[Number of Pairs] 240
|
|=============================================================================
| Keyword: [Pin List]
| Required: Yes, if the [Number of Pins] keyword has been used.
| Either the [Pin List] or [Pair List] keyword must be used but
| not both. [Pin List] is used only when the [Number of Pins]
| keyword has been used and [Pair List] is used only when the
| [Number of Pairs] keyword has been used.
|Description: Tells the parser the set of names that are used for the part's
| external pins and also defines pin ordering. The first pin name
| given is the "lowest" pin, and the last pin given is the
| "highest".
|Usage Rules: Following the [Pin List] keyword, the names for the pins are
| listed. There must be as many entries listed as there are pins
| given by the preceding [Number of Pins] keyword. Pin names must
| be the alphanumeric external pin names of the part. The pin
| names cannot exceed eight characters in length.
|-----------------------------------------------------------------------------
|
| A SIMM CIRCUIT BOARD OR UNMATED CONNECTOR EXAMPLE
|
[Pin List]
A1
A2
A3
| .
| .
A22
B1
| .
| .
|etc.
|
|=============================================================================
| Keyword: [Pair List]
| Required: Yes, if the [Number of Pairs] keyword has been used.
| Either the [Pair List] or [Pin List] keyword must be used but
| not both. [Pair List] is used only when the [Number of Pairs]
| keyword has been used and [Pin List] is used only when the
| [Number of Pins] keyword has been used.
|Description: Tells the parser the set of names that are used for the part's
| external pins, matches the names that are at opposite sides of
| each conductive path and also defines pin ordering. The first
| pin name given is the "lowest" pin, and the last pin name given
| is the "highest". Pin names are assigned in column order. That
| is, first all pin names on one side are assigned in the order
| given, then the other side is assigned in the order given.
|Usage Rules: Following the [Pair List] keyword, the paired pin names for the
| pairs are listed. There must be as many pair entries listed as
| there are pairs given by the preceding [Number of Pairs] keyword.
| Pin names must be alphanumeric. They provide the internal names
| that are used in the [Path Description] keyword. They are
| matched to the external pin names of the part. The pin names
| cannot exceed eight characters in length. The special pin name,
| NC, is reserved to represent no-connection if a pin name is not
| used on one side or the other of the interconnection.
|-----------------------------------------------------------------------------
|
| A MATED CONNECTOR EXAMPLE
|
[Pair List]
RA1 PA1
RA2 PA2
RA3 PA3
| . .
| . .
RA22 PA22
RB1 PB1
| . .
| . .
|etc. etc.
|
|============================================================================
| Keyword: [Path Description]
| Required: Yes, unless the [Coupled Path Model] Keyword is used.
|Description: This keyword allows the user to describe the connection
| between the user accessible pins of a part and the pins of
| the ICs mounted on that part. If describing a connector,
| this keyword is used to describe the path from one pin of a
| connector pin-pair to the other pin of the same pair. The
| Fork and Endfork subparameters allow branching to other
| pin-pair paths. Those connections can also be made through
| other components by using the Node subparameter. NOTE that
| this means that pin names can appear more than once.
|
| BOUNDARIES OF MODEL PATHS:
| In any system, each part interfaces with another part at some
| boundary. Every part model must contain the components
| necessary to represent the behavior of the part being modeled
| within its boundaries. The boundary definition depends upon
| the parts being represented by the model.
|
| For CARD EDGE CONNECTIONS such as a SIMM or a PC Daughter
| Card plugged into a SIMM Socket or Edge Connector, the
| boundary should be at the end of the board card edge pads as
| they emerge from the connector. The pads need to be included
| in the connector model.
|
| For any THROUGH-HOLE MOUNTED PART, the boundary should be at
| the surface of the board on which the part is mounted. This
| also applies to an IC plugged into a socket. The portion of
| the IC pins that project into the socket must be included in
| the socket model.
|
| SURFACE MOUNTED PART models end at the outboard end of their
| recommended surface mount pads.
|
| CONNECTOR models must be mated connections unless the
| connector is commonly used in an unmated condition such as in
| a digital bus where all slots are not filled. Unmated
| connector models would have only one boundary; the board-
| connector boundary.
|
| Combination models can be made when two parts are always used
| together, such as with a Pentium-PRO and its socket. In that
| case, the socket-to-board boundary is the only one used.
|
| Sub-params: Len, L, R, C, Fork, Endfork, Pin, Node
|Usage Rules: Each individual connection path (user pin to node(s)
| description or connector pin-to-pin description) begins with the
| [Path Description] keyword and a path name, followed by the
| subparameters used to describe the path topology and the
| electrical characteristics of each section of the path. The
| path name must not exceed 40 characters, blanks are not allowed,
| and each occurrence of the [Path Description] keyword must be
| followed by a unique path name. The individual subparameters
| are broken up into those that describe a section's electrical
| properties, and those that describe the topology of a path.
|
| SECTION DESCRIPTION SUBPARAMETERS:
| The Len, L, R, and C subparameters specify the length, the
| series inductance and resistance and the capacitance to ground
| of each section in a path description.
| Len The physical length of a section. Lengths are given
| in terms of arbitrary 'units'. Any non-zero length
| requires that the parameters that follow must be
| treated as distributed elements by the simulator.
| L The series inductance of a section, in terms of
| 'inductance/unit length'. For example, if the total
| inductance of a section is 3.0nH and the length of the
| section is 2 'units', the inductance would be listed
| as L = 1.5nH (i.e. 3.0 / 2).
| C The capacitance to ground of a section, in terms of
| capacitance per unit length.
| R The series DC (ohmic) resistance of a section, in
| terms of ohms per unit length.
|
| TOPOLOGY DESCRIPTION SUBPARAMETERS:
| The Fork and Endfork subparameters denote branches from the
| main pin-to-node or pin-to-pin connection path. The Node
| subparameter is used to reference an external component
| description file. The Pin subparameter is used to indicate
| the point at which a path connects to a user visible pin.
| Fork This subparameter indicates that the sections
| following (up to the Endfork subparameter) are part
| of a branch off of the main connection path. This
| subparameter has no arguments.
| Endfork This subparameter indicates the end point of a
| branch. For every Fork subparameter there must be a
| corresponding Endfork subparameter. As with the Fork
| subparameter, the Endfork subparameter has no arguments.
| Node pin.reference_designator
| This subparameter is used when the connection path
| connects to a pin of another, externally defined part.
| The arguments of the Node subparameter indicate the pin
| and reference designator of the external component. The
| pin and reference designator portions of the argument are
| separated by a period ("."). The reference designator is
| mapped to an external component description (another .eid
| file or a .ibs file) by the [Reference Designator Map]
| Keyword.
| Pin This subparameter is used to mark the point at which
| a path description connects to a user accessible pin.
| Every path description must contain at least one
| occurrence of the Pin subparameter. It may also contain
| the reserved word NC. The value of the Pin subparameter
| must be one of the pin names listed in the [Pin List] or
| [Pair List] section.
|
| Using The Subparameters to Describe Paths:
| A section description begins with the Len subparameter and
| ends with the backslash (/) character. The value of the Len, L,
| R and C subparameters and the subparameter itself are separated
| by an equals sign (=); whitespace around the equals sign is
| optional. The Fork, Endfork, Node and Pin subparameters are
| placed between section descriptions (i.e. between the concluding
| backslash of one section and the 'Len' parameters that starts
| another). The arguments of the Pin and Node subparameter are
| separated by white space; no equal sign nor backslash (/)
| character is used.
|
| Specifying a Len or L/R/C value of zero is allowed. If
| Len = 0 is specified, then the L/R/C values are the total
| for that section. If a non-zero length is specified, then
| the total L/R/C for a section is calculated by multiplying
| the value of the Len subparameter by the value of the L,
| R or C subparameter. However, as noted below, if a non-
| zero length is specified, that section MUST be treated as
| distributed elements.
|
| Legal Subparameter Combinations for Section Descriptions:
|
| A) Len, and one or more of the L, R and C subparameters. If
| the Len subparameter is given as zero, then the L/R/C sub-
| parameters represent lumped elements. If the Len subparameter
| is non-zero, then the L/R/C subparameters represent distributed
| elements.
|
| B) The first subparameter following the [Path Description]
| keyword must be 'Pin', followed by one or more section
| descriptions. The path description can terminate in a node,
| section, another pin or the reserved word, NC.
|
| C) All paths and subpaths (a path between Fork and Endfork)
| end in a Pin, a Node or NC.
|
|---------------------------------------------------------------------------
|
| A TYPICAL CONNECTOR DESCRIPTION EXAMPLE
|
[Path Description] J1-P1
Pin J1
Len = 2.0 L=8.35n C=3.34p R=0.01 /
Len = 0.5 L=1.0n C=2.7p /
Pin P1
|
| AN EXAMPLE PATH FOR A SIMM MODULE
|
[Path Description] CAS_2
Pin J25
Len = 0.5 L=8.35n C=3.34p R=0.01 /
Node 15.u21
Len = 0.5 L=8.35n C=3.34p R=0.01 /
Node 15.u22
Len = 0.5 L=8.35n C=3.34p R=0.01 /
Node 15.u23
|
| A DESCRIPTION USING THE FORK AND ENDFORK SUBPARAMETERS
|
[Path Description] PassThru1
Pin B5
Len = 0 L=2.0n /
Len = 2.1 L=6.0n C=2.0p /
Fork
Len = 1.0 L= 1.0 C= 2p
Node 15.u23
Endfork
Len = 1.0 l = 6.0n C=2.0p /
Pin A5
|
| A MORE COMPLEX CONNECTOR or BOARD DESCRIPTION EXAMPLE
|
| A metal part or trace with 2 connections on one side and one
| connection on the other side.
| +--------------+
| | |
| RG1 +====+\ | NC
| | L1 |
| | R1 |
| RG2 +====+/____L2__R2___+====+ PG2
| | |
| +--------------+
[Path Description] RG1-NC
Pin RG1
Fork
Len = 1.0 L=0.3n R=0.01 /
Pin RG2
Endfork
Pin NC
|
[Path Description] RG2-PG2
Pin RG2
Len = 1.0 L=1.3n R=0.04 /
Pin PG2
|
|=============================================================================
| Keyword: [Coupled Path Model]
| Required: Not at the present time. This keyword is reserved for future use.
|Description: This keyword will introduce a coupled model path description in
| some format yet to be determined.
| Sub-params: TBD
|Usage Rules: TBD
|
|-----------------------------------------------------------------------------
| [Coupled Path Model] Example TBD
|
|=============================================================================
| Keyword: [Reference Designator Map]
| Required: Yes, if any of the path descriptions use the Node
subparameter.
|Description: Indicates the linkage between a reference designator and the
| external part it represents.
|Usage Rules: The [Reference Designator Map] keyword must be followed by a
| list of all of the reference designators defined in the Node
| subparameter under the [Path Description] keyword. Each
| reference designator is followed by the Name of the part to which
| it is linked and the terms are separated by whitespace. The part
| Name may be another .eid or .ibs model. A referenced .eid model
| may be internal to the calling .eid file or it may be an external
| file with an appropriately given pathname.
|-----------------------------------------------------------------------------
[Reference Designator Map]
|
| EXTERNAL PART REFERENCES
|
u23 80286.ibs
u24 SIMM.eid
u25 C:\LIBS\LS244.ibs
|
| AN INTERNALLY DEFINED .eid MODEL OF A 10K RESISTOR
|
u26 R10K
|
|===========================================================================
| Keyword: [Model Data], [End Model Data], [Resistance Matrix],
| [Inductance Matrix], [Capacitance Matrix], [Bandwidth], [Row]
| Required: Not at the present time. These keywords are reserved for future
| use for coupled models.
|===========================================================================
| Keyword: [End Electrical Description]
| Required: Yes
|Description: Marks the end of an Electrical Interconnect Description.
|Usage Rules: This keyword must come at the end of each complete electrical
| interconnect model description.
|
| Optionally, a comment may be added after the [End Electrical
| Description] keyword to clarify which interconnect model has
| ended.
|---------------------------------------------------------------------------
[End Electrical Description] | End: 16Meg X 8 Simm Module
|
****************************************************************************
ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:
Received on Tue Nov 5 09:15:26 1996
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