Text item:
Scott,
They way you do this is like optimization. You do your measurements on the
device (in the package) and then you make an IBIS model for it (including
package). Then you tweek the IBIS rise and fall time parameters untill the
simulated rise and fall times at the output of the package match the
measuremets.
Arpad Muranyi
Intel Corporation
=========================================================================
Scott:
From a bench measurement point of view, it's almost impossible to
measure rise/fall on a die(wafer). Measuring Rise/Fall on a packaged device
takes into account the C_comp effect as well.
I believe this parameter measurements were defined by SPICE users
where it's easy
to isolate package effects.
Regards,
Syed
National Semiconductor Corp.
> From owner-ibis@vhdl.vhdl.org Wed Oct 30 11:42:53 1996
> Date: Wed, 30 Oct 96 12:35:14 PPE
> From: scotts@actel.com (Scott Schlachter)
> To: ibis@vhdl.org
> Subject: Question to IBIS Reflector
> Content-Length: 641
>
> IBIS folk:
>
> I am curious how one does rise and fall time measurements
> using packaged parts. The spec calls for these ramps to be measured
> on I/Os with no loading, but this implies wafer-level measurements
> which are less than ideal from a noise standpoint. One can use a
> high-impedance probe on packaged parts but then one gets a few pF
> and a few nH of LC network. In programmable logic it is almost
> imperative that a tester be used, as the I/Os must be programmed
> into their appropriate modes.
>
> My guess is that this will cause little effect on the
> rise and fall times, but is this correct? Is this something that
> really must be SPICEd?
>
>
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