RE: PCI IBIS Model

>Paul,
>
>Making an I/V curve track the maximum and minimum curves may not give you the
>corners of performance you are looking for. Instantaneous impedance, dv/di
>could theoretically be open or short. i.e. rho = +/- 1. What I've done is
>look at various chip mfgs i/v curves and make a composite of the corners.
>Incidently I only need to go to this extreme if I'm pushing reccomended PCI
practices...else I just use the models that come with Hspice.

You also need to make some calls on the wave shape even though there are
>spec's on slew.
>
>... Richard Mellitz, NCR
>
>----------
>From: Paul Gregory[SMTP:pgregory@hpbs2933.boi.hp.com]
>Sent: Monday, August 25, 1997 12:46 PM
>To: ibis@vhdl.org
>Cc: pgregory@boi.hp.com
>Subject: Re: PCI IBIS Model
>
>
>I apologize for not making my request more clear the
>first time.
>
>Rather than a specific PCI implementation, I am looking for
>a PCI IBIS model that models exactly the PCI spec, that is,
>the v/i curves (and other sections) track exactly along the
>lines of the spec limits. Usually any PCI implementation will
>be between the min/max boundaries; I want a model that is
>exactly on the boundaries. I would like a model that includes
>ramps, diodes, pull up/down, and comp/pkg parameters. Am I
>missing other parts of the model that should be in it?
>
>Thanks for your help.
>
> -- Paul Gregory
>
> phone: (208) 396-5086 USmail: Hewlett-Packard
> fax: (208) 396-4122 M/S 143
> email: paul_gregory@hp.com 11311 Chinden Blvd.
> Boise, ID 83714
>
 
Received on Mon Aug 25 20:03:30 1997