IBIS face to face

Hi ibis type persons,

I am still at Design Supercon but I thought you might like to get the minutes from the
meeting such as they are. I will be working with Syed to make available some computer
readable format of any of the presentations that the presenters wish to provide.

take care,
Jon

Minutes of the ANSI/EIA-656 Meeting IBIS 1/20/97 at SUPERCON97 at the Santa Clara Westin

Secretaries Notes:
This was an extremely well attended meeting containing representatives from all of the various areas of IBIS
interest, including IC manufacturers, Connector manufacturers, EDA vendors, and end users. There were
several interesting presentations on various topics. I have attempted to note some of the highlights of those
topics and will work with Syed to make the actual presentations available to all IBIS members via the ftp
reflector or WWW site. I apologize for the roughness of this data but it is hard to type and argue at the same
time.

Special thanks to Syed Huq and National Semiconductor for hosting the IBIS face to face. They provided an
excellent room, superior refreshments, and a microphone so we could hear Stephen Peters.

Introductions.
Syed Huq: Presiding
Jon Powell: acting secretary
Patti Rusher: EIA Representative

Review of schedule.

Questions about who is providing models.
Comments from the librarian on providing models to the library or seeking assistance in model development.
Jon Powell has offered to run QA checks on ANY models that emailed to him at jonp@qdt.com. He is also
soliciting models to be added to the IBIS reflector. Jon has not received any (new) models for release during
the last 8 months. (well, maybe from Arpad but those don’t count because he is so good at it).

Syed: IBIS Road map

Use of the reflector

IBIS Poster Page
If you wish you company logo added or updated, please send your logo to jonp@qdt.com. It should be in
bmp or tiff format and have a size of about 800x200 pixels. Bigger is better as he can size it down.

EIA Membership Update (patty)
23 Members to date.
Committee Membership is $500.00
Membership applications are available from patty and will soon be available on the web at the IBIS site.
IBIS will be represented at DAC in EIA booth.
IBIS is number 2 in the EIA on hits on the web page.
Over 7000 hits since page inception.
IEC Update: is going through the international technical committee. Will be assigned to Hillary Con. Hope
to have out as a full standard in the next two years.
Patti distributed membership bills at the meeting.

John Fitzpatrick: User Presentation.
Makes telephone switches. Alcaltel has committed to building a large library of IBIS models. Have
classically solved this problem using Bergeron Diagrams.
Want to use for simulation and extracting information to create design rules.

Found %100 errors in IBIS models (but none of those were off the reflector).
They found that they had to generate many of the models themselves.
Will be building models from an SI lab and checking all Models. Want to use IBIS models to do constraint
driven routing.
Will be using IBIS files as a database to extract information for design rules. Such things as : do 3 volts
devices need protection?
Can also use IBIS to help with crosstalk control and route constraint generation for correct by design
routing. Don’t know output impedance of a component to select proper series termination but you can get
this information from IBIS.
Wish lists:
1) Unable to model series components. (very important)
2) Non-monotonic IV curve models.
3) R,L,C description capability.
4) BUS Switch Models (This is a very important issue)

They want to keep all models in IBIS format and right now they are being forced to keep things in multiple
formats because IBIS does not support the above issues.

Less Important wishes:
1) Easier to understand IV curves: suggests the need for new keywords that support pure measurement
values and let the simulator do the necessary subtractions etc. (Audience suggests that development of a
better editor or input technology).
2) More background information in the model. Contact information, Brief description of the component,
or URL to component description.
3) Unique buffer names. Guidelines on buffer naming: each supplier should use a unique meaningful
name.
4) Model Verification:
5) Long term goal: Full Electrical Specification (don’t need data-sheets).
6) Recommended paper data-sheet format for representing IBIS models
7) Better specification of “minimum” data to have a IBIS models.
8) IBIS as a specification tool
  ASICs (to allow for a choice of output buffers)
  Second sourcing (give us a part that matches this model)
  Industry-standard I/O (“Golden” ibis models representative of industry standard technologies
(LCT, LVC, AC FAST, Memories etc.)

Kelle on Visual IBIS editor for Windows
Free on several websites.
Seeking inputs on how to improve the editor.
Win3.1, WIN95 or WINNT but runs better on 95 and NT
has built in 2.1 and 1.1 syntax checker.
Skeleton Generator
Has built-in viewers for seeing the various tables graphically. (cannot edit graphically). This viewing can
greatly assist in debugging the data.
Can get this from www.hyperlynx.com

Looking to do Feature Update and looking for suggestions. Sheets were passed out which asked people for
their inputs.

Suggestions given by Audience:
1) show loading conditions on waveforms
2) overlay multiple curves for comparison of different models.
3) Don’t show clamp of data beyond data range. Just show the end of the data.
4) Veribest might provide a SPICE2IBIS converter in WIN95 executable format.
5) remove “CONTROL-M” for output because they aren’t allowed in standard. (is this true?)
6) Graphically edit curve.
7) Pop-up Menu with blanks for all input values.

email: kellee@hyperlynx.com

ASIDE: we need to define in IBIS what happens at the end of the IBIS data.
Contact Ian about putting SPICE2IBIS WINNT version on the web site.

5 minute break.

Don Telian: Signal Integrity Engineering in High-speed Digital Systems
Surveyed 5 managers of SI groups and put their feedback in this presentation
(see don’s slides for actual presentation).
The goal of this presentation is to define the SI engineer and put him on the map.

Electrical description is moving from a static form to a dynamic form.
7 roles of SI Engineer:
1) Pioneering and Defining
2) Partitioning and Approximating
3) Modeling and Measuring
4) Design and Optimizing
5) Quantifying and verifying
6) Reducing and Simplifying
7) Correlating and Debugging

Resolve not to whine and use good judgment.

ABT simulation problems Jon Powell
The TI abt SPICE model demonstrates a charged pumping and load dependent IV curve phenomena that jon
does not believe can be represented with current IBIS technology. Jon presented an encapsulation of the
circuit and showed some example simulations. Jon will post full report to the IBIS reflector for further
discussion.

Carl - HP EESOF IBIS survey
How do people develop models:
1) Most use SPICE to develop models (in fact %100 of responders derived from SPICE)
2) Opportunity for commercialization of SPICE to IBIS converter (but the price they would pay is
probably pretty small)
3) 4 out of 7 said they did use some measurement techniques to do the simulation.
4) No recognized budget for generating models.

Arpad: Integrated Termination for Low Power, Low Cost, High Speed Signaling
This is a new feature that Intel is working on putting in their chips.

PCB needed to develop a low cost desktop chip set solution for the P6. Had to be low cost as the PC market
is very competitive.
GTL bus needs two terminators. This cost too much money and current.
Found a good technique that works in both GTL and CMOS. Lets you get rid or resistors.

Worst case circuit: T circuit with termination in the middle.
Terminating at both ends causes.
So they need a termination with a special IV curves with no currents at VOH and VOL.
Use “Early” clamps to match diodes to desired curve.
In GTL systems, VOL drifts because it varies on buffer strength (and the strength of the pullup device).

Static Early clamps are easy to model by inserting IV curves into the clamps.

Dynamic curves are harder. Perhaps shift a IV curve as controlled by a VT curve. But the shifted IV curve
might not be the same as the original IV curve. The timing is completely dependent on the implementation
of the method, which is not defined. Arpad wants to come up with a IBIS description method that
encompasses all possible implementation techniques.
Suggestion was made to try and fit this into the Multi-Driver bird. It would have to be modified to a multi-
receiver technology with a threshold test. Arpad will get this onto the reflector

Steven Peters: Bird 36.d
Two Purposes:
  Simple board descriptions (SIMMS)
  Connectors (coupled and uncoupled)
  Complex (coupled) board descriptions best left to physical/layout extraction (EDIF 4.0 calls out IBIS
models).

Some Highlights:
  Bird 36.d defines interconnect boundaries.
  In general [application info] is used for connectors. Provides critical information that the connector
vendors feel is important, like the rise time that the model is good for (bandwidth of model?)
  [Number of pins] used for boards, unmated connectors and such.
  [Number of pairs] is there to support connectors that use an eventual matrix description.
  Bird does not make clear that nodes is not a general named node for interconnection (this is being
fixed).
  Makes clear that if length > 0, then it is a distributed element.

COUPLING:
  goal is to describe a connector, not a general board interconnect.
  Basic approach is cascaded, name matrix
  One problem is data reduction: do you really want to describe a 200 pin, 4 row connector?
  Another Problem: Accuracy (?)
  Must agree on what data represents/ how to process data.

Mated model includes both male and female pins in the same connection
Unmated is only the male or female part.

Lots of argument concentrating on what is an acceptable way to specify a coupling matrix for connectors. I
think it was finally agreed that such a matrix formalization does exist and the syntax needs to be agreed on.
DC Sessions was concerned that there is not a definition for the local ground on a SIMM to be able to
model local ground bounce on the SIMM.

Next Teleconference will be Feb. 14th
Reservation number will be put on the reflector.

First Topic for the 14th: Clarification of what needs to be done for 3.0

Discussion on model verification: Putting signatures into IBIS models that prove that certain checks were
run?
It is the EDA companies responsibility to service their customers.

Actel asked for us to make the SOURCE keyword required such that all models can be traced.
But that suggestion was met with some opposition as we have no way to enforce.

Meeting Adjourned
Received on Wed Jan 22 23:24:58 1997