re: needed for IBIS V3.1

Hans, you say that IBIS models are easier to work with than HSPICE models.
What tool do you use to run the IBIS models? I use HSPICE, it's an
accurate tool and up until now 90% of the device models provided, ASICs and
discrete transistors, have been in HSPICE format.
Now some of our suppliers are starting to create IBIS models and a couple
have said they are switching exclusively to IBIS format for all their
future ASIC and transistor models.
My question is, does anyone have a translator from IBIS to HSPICE or
Berkeley or PSPICE format? If not, how have other SPICE users handled the
problem of running IBIS models?
Thank you,
 Fabrizio Zanella
                                                  _/ _/ email:
zanella_fabrizio@emc.com
       _/_/_/_/ _/ _/ _/_/_/ _/ voice: (508) 435-1000 Ext.
4645
      _/ _/_/ _/_/ _/ _/ Fax: (508) 435-8949
     _/_/_/_/ _/ _/ _/ _/ _/_/_/
    _/ _/ _/ _/ EMC Corporation
   _/_/_/_/ _/ _/ _/_/_/ 171 South Street
                                                Hopkinton, MA 01748-9103
-------------
Original Text
From: Hans M Hilbig <h-hilbig@ti.com>, on 6/6/97 11:31 AM:
To: <ibis@vhdl.org>, "Steve Kaufer" <stevek@hyperlynx.com>

Steve,
I fully subscribe the statements of your msg about the example files.
Having
started with IBIS in my group early this year, we are still relativly new
to
IBIS and can remember well the pitfalls we were trapping into. We had two
major
reasons to generate IBIS models: Our customers like it and it's (still)
relativly easy to construct and to tweak (compared to H-SPICE). Personally
I'm
concerned that IBIS will become so blown up in the future that the latter
reason will go away. Adding more bells and whistles does not necessarily
mean
better 'accuracy', particularly if you don't have real (accurate) data to
feed
the bells and whistles. Pls remember that our customers want us to supply
IBIS
models early in the development stages, mostly at that time when the design
(and its simulation) is not completed yet. The more estimates and
judgements we
add, the higher the chance that the model does not reflect the silicon that
comes out later.

Regards,
Hans M Hilbig
**************************************************************
EMSLP New Products Characterization Texas Instruments Freising
Phone: +49-8161-804126 FAX:+49-8161-804909
e-mail: h-hilbig@ti.com

------------------
Original text

From: Steve Kaufer <stevek@hyperlynx.com>, on 6/6/97 9:25 AM:
Mini-topic for the upcoming IBIS Summit meeting at DAC:

I believe it's important for V3.1 of the specification to include several
simple, clear example files, e.g., a simple IC using a minimum of
constructs, a more-complex IC using a few "extra" features like waveform
tables, a network-packaged passive device, and a bus switch.

Why? Because lacking these, the specification is so intimidating to
newcomers that many are being scared off, to the detriment of the entire
standard. Remember V1.x? It was a relatively quick, easily comprehended
"read." What we have now is richer and more powerful, but also
exponentially
more confusing. Some of us on the committee are probably "velocitized" to
the point where we're not aware of the problem's gravity.

From recent conversations with IBIS "newbies" (and this includes
semiconductor-vendor personnel, unfortunately), I think it works like this:

1. Reads IBIS spec (or part of it).
2. Wants to kill self.
3. Hears about Spice-to-IBIS, and thinks "that's my only hope!"
4. Then the real trouble begins...

Personally, I'd like to see the opening page of the spec state clearly that
about 85% of modeling applications can use about 25% of the specification's
constructs, and point straight to the example models. Also good would be a
designation of some kind delineating between "basic" and "luxury"
constructs.

I'd be interested in hearing opinions about this at the Summit...

Regards,

Steve Kaufer,
HyperLynx

 
Received on Fri Jun 6 12:31:19 1997