Re: Question on Ramp

Bernhard,

This is yet another one of those IBIS details where the spec
ASSUMES you know what the "preferred" termination voltage is!
Actually, the answer is in there, but it forces you to go
scavenging through the IBIS spec to find it. (This is one of
my big complaints about the IBIS spec.)

If you look near the very back of the 2.1 IBIS spec, under the
section "NOTES ON DATA DERIVATION METHOD", you will find this:

| 3) Ramp Rates:
...
| b. If: The Model_type is one of the following: Output, I/O, or
| 3-state (not open or ECL types);
| Then: Attach a 50 ohm resistor to GND to derive the rising edge
| ramp. Attach a 50 ohm resistor to POWER to derive the
| falling edge ramp.
|
| If: The Model_type is Output_ECL or I/O_ECL;
| Then: Attach a 50 ohm resistor to the termination voltage
| (Vterm = VCC - 2 V). Use this load to derive both the
| rising and falling edges.
|
| If: The Model_type is either an Open_sink type or Open_drain type;
| Then: Attach either a 50 ohm resistor or the vendor-suggested
| termination resistance to either POWER or the vendor-
| suggested termination voltage. Use this load to derive both
| the rising and falling edges.
|
| If: The Model_type is an Open_source type;
| Then: Attach either a 50 ohm resistor or the vendor-suggested
| termination resistance to either GND or the vendor-suggested
| termination voltage. Use this load to derive both the rising
| and falling edges.

So your assumptions are correct for a standard CMOS/TTL type
output buffer.

This is one of many areas where the IBIS spec desperately needs
fixing.

Regards,
Andy Ingraham
 
Received on Wed Jun 18 12:59:16 1997