BIRD41.1 Switch Model

To IBIS Committee:

One of the interesting problems associated with BIRD41.1 is the
modeling of MOSFET series switches. I believe a behavioral
model exists which can be extracted from measurements or Spice
models.

Below is an HSPICE Netlist for testing some ideas. Although I used
a generic NMOS transistor, the setup and performance was based
originally on the Texas Instruments 74CBT3383 Spice model without
any package elements. Input and output capacitances are put into
the models to mimic the performance, but these can be removed.

The intent is to compare performance of the NMOS model (nodes 1 and 3)
and the Behavioral model (nodes 11 and 13) for a given set of test
loads including open transmission lines and for various pulse amplitudes.

The main idea tested here is whether a series model can be derived from
IV characteristics of a device. The models below are based on a
turned on device with Vgate = 5 V. The IV tables are Ids through
the device as a function of Vs, with Vds = (.5V, 1V and 2V). A "linear"
model is based ONLY on the 1 V table and assumes a linear functional
relationship between Ids and Vds. This is really an APPROXIMATION.

Two other tests are developed taking TWO of the three tables. One test
"G5" uses the 0.5 V and 1.0 V tables. The other test "G1" uses the
1.0 V and 2.0 V tables. The data from two tables is used to fit
a second order function - as a better APPROXIMATION. In the region
of interest, the Ids/Vds relationship follows a square law relationship,
according to simple theory.

Some additional code is put in so that the behavioral function works
in BOTH directions - so the minimum of the S and D nodes are consider
the Source for the purpose of table extraction, and the direction of
current flow is defined by the polarity of Vds.

The tables are very rough and could use more points. Even so, the
reults show good comparison.

Best Regards,
Bob Ross
Interconnectix

* TEST CASE FOR SERIES SWITCH MOS MODEL USING NMOSFET ONLY

* 1 3
* | |
* ____________
* o---/\/\/\---o o-----O____________)---o Open
* 10 ohms |___| TD = 0.5 nS
* | Z0 = 50 ohms
* Vcc
* Vh /----\
* / \
* 0 --/ \----- 0.1ns Rise and Fall
*
*
*
* MODEL: Ids = K1 * Vds + K2 * Vds * Vds
* = (K1 + K2 * Vds) * Vds
*
* Implemented as: Ids = (K1 + K2 * ABS(Vds)) * Vds
*
* Vds = Vd - Vs is used to change the sign of the current
* if Vs > Vd
*
* Is
* D ---> S
* 11 o---o--/\/\/\--o---o 13
* _|_ _|_
* C11 ___ ___ C13
* | |
* GND GND
*
*
*
*--------------------------------------------------------------------------
* TABLE OF Ids (2) vs Vs (1) for Vds = 0.5 V
*
.SUBCKT SER5 1 100 2
* | | |
* | | Current Source Output
* | Reference Voltage
* Output Sense Voltage
*--------------------------------------------------------------------------
GSW 2 100 PWL(1) 1 100
+ 0. 1.469e-01
+ 1.0000e+00 1.191e-01
+ 2.0000e+00 8.252e-02
+ 3.0000e+00 2.843e-02
+ 4.0000e+00 4.394e-11
+ 5.0000e+00 0.0
.ENDS
*
*--------------------------------------------------------------------------
* TABLE OF Ids (2) vs Vs (1) for Vds = 1 V
*
.SUBCKT SER1 1 100 2
* | | |
* | | Current Source Output
* | Reference Voltage
* Output Sense Voltage
*--------------------------------------------------------------------------
GSW 2 100 PWL(1) 1 100
+ 0. 2.579e-01
+ 1.0000e+00 2.030e-01
+ 2.0000e+00 1.298e-01
+ 3.0000e+00 3.119e-02
+ 4.0000e+00 5.272e-11
+ 5.0000e+00 0.0
.ENDS
*
*--------------------------------------------------------------------------
* TABLE OF Ids (2) vs Vs (1) for Vds = 2 V
*
.SUBCKT SER2 1 100 2
* | | |
* | | Current Source Output
* | Reference Voltage
* Output Sense Voltage
*--------------------------------------------------------------------------
GSW 2 100 PWL(1) 1 100
+ 0. 3.943e-01
+ 1.0000e+00 2.866e-01
+ 2.0000e+00 1.516e-01
+ 3.0000e+00 3.534e-02
+ 4.0000e+00 6.929e-11
+ 5.0000e+00 0.0
.ENDS
*--------------------------------------------------------------------------

* POWER AND GND
V100 100 0 0
V199 199 100 5

***************************************************************************
* MOSFET FOR 1-3 CONNECTION USED FOR REF.

V95 5 100 5
MOS 1 5 3 100 NMOSFET W=1440U L=0.64U
C1 1 100 6P
C3 3 100 6P
.OPTIONS TNOM=40.00
.MODEL NMOSFET NMOS LEVEL=3

* SOURCE AND LOAD
R1 91 1 10
*
R3 3 100 50G
TL 3 100 9 100 Z0=50 TD=.5N
R9 9 100 1G

***************************************************************************
* TABLE DRIVEN MODEL SIMULATION WITH 11-13 CONNECTION

* DRAIN TO SOURCE VOLTAGE (SIGN CONTROLS CURRENT FLOW DIRECTION)
EDS 34 100 VOLT='V(11)-V(13)'
RDS 34 100 1G
EABS 33 100 VOLT='ABS(V(11)-V(13))'
RABS 33 100 1G

* SELECT G5, G1, OR GLIN:
*
* Id = (K1 + K2 * Vds) * Vds

* Using Vds = .05 V and 1 V Tables:
*
* K1 = 4 * I5(Vs) - I1(Vs)
* K2 = 2 * I1(Vs) - 4 * I5(Vs)
*
G5 11 13 CUR='V(34)*(I(V5)*4-I(V1)+(2*I(V1)-4*I(V5))*V(33))'

* Using Vds = 1 V and 2 V Tables:
*
* K1 = 2 * I1(Vs) - I2(Vs) / 2
* K2 = I2(Vs) / 2 - I1(Vs)
*
* G1 11 13 CUR='V(34)*(I(V1)*2-I(V2)/2+(I(V2)/2-I(V1))*V(33))'

* Using Vds = 1 V and Linear Approximation
*
* K1 = I1(Vs)
* K2 = 0
*
* GLIN 11 13 CUR='V(34)*I(V1)'

* MIN OF SOURCE OR DRAIN BECOMES "Vs"
EMIN 38 100 VOLT='MIN(V(11), V(13))'

* I1(Vs)
X1 38 100 35 SER1
V1 100 35 0

* I2(Vs)
X2 38 100 36 SER2
V2 100 36 0

* I5(Vs)
X5 38 100 37 SER5
V5 100 37 0

* INPUT AND OUTPUT CAPACITANCE WHICH MATCHES SPICE MODEL
C13 13 100 6P
C11 11 100 6P

* MODEL SOURCE AND LOAD
R11 91 11 10
*
R13 13 100 50G
TL1 13 100 19 100 Z0=50 TD=.5N
R19 19 100 1G

***************************************************************************

* INPUT PULSE
VIN 91 100 PULSE 0 3 0 .1N .1N 2N 4N

.TEMP 50.
.TRAN .1N 4N
.PRINT TRAN V(3) V(13)
.OPTIONS POST INGOLD=2

.END

 
Received on Thu May 8 13:54:35 1997