Re: Characterization Conditions

Hello Rob:

   By "recommended characterization conditions" I assume you mean
the output loads/voltages use to extract V/T waveforms. Because the
GTL/GTL+ outputs are open-drain, I would extract the V/T waveforms
using the rules for open drain buffers -- a load resistor to
Vterm, with the value of Rterm and Vterm determined by the
specification or part manufacturer. As for the other standards,
if the driver uses a standard push/pull structure use the rules for
standard CMOS or TTL (depending on the technology of the buffer).
Remember: by taking the V/T waveforms with a load tied
to Vcc then to ground, one can isolate the turn-on, turn-off and
overlap times of the pullup and pulldown structures, thereby allowing
the simulator to construct an accurate model of the driver. This
model should be accurate, even if the driver application calls for
the output to be terminated to Vcc/2, or series terminated, or whatever.

          Regards,
          Stephen Peters
          Intel Corp.

> I have read with interest the latest version of the
> IBIS cookbook. It details recommended characterization
> conditions for simulating TTL, ECL, LVCMOS, etc. It
> does not contain recommended conditions for measuring
> newer I/Os, i.e. SSTL, HSTL, GTL, LVDS.
>
> What are the recommended simulation conditions for these
> I/Os?
>
> Rob Eccles
> Xilinx
> rob.eccles@xilinx.com
Received on Thu Dec 17 12:29:42 1998