Re: JEDEC meets IBIS

D. C.:

Can we discuss this at the next IBIS meeting on March 13?
I think we can do IBIS Models for these technologies.

Bob Ross
Interconnectix/Mentor Graphics

> Date: Wed, 04 Mar 1998 15:51:11 -0700
> From: "D. C. Sessions" <dc.sessions@tempe.vlsi.com>
> Organization: VLSI Technology Inc.
> To: IBIS Mailing list <ibis@vhdl.org>
> CC: Gil Russell <gilbert.russell@sci.siemens.com>

> Thumbnail meeting report:

> Yesterday I attended the quarterly JEDEC JC-16 meeting.
> JC-16 is the group responsible for JEDEC signalling
> standards such as SSTL, HSTL, etc. Among other things
> announced was the establishment of JC-16B, a working
> group chartered with modelling and testing issues.

> Some smartmouth in the back of the room pointed out
> that the JC-16 membership was rich in semiconductor
> manufacturers and system houses but totally lacking
> in EDA companies, which might be a slight handicap
> when addressing modelling and test issues. To the
> surprise of no one, said impulsive individual got
> the appropriate reward: assignment as liason to the
> EIA IBIS committee, which apparently has a complementary
> membership and is posessed of much-needed expertise.

> Note that the CC: on this message is to one Gil Russell,
> whose misfortune is to chair JC-16B. This could be
> the start of a VERY profitable collaboration.

> Item on the table: JC-16 meets quarterly along with a
> slew of other JEDEC committees. We (IBIS) should
> consider moving our winter face-to-face meeting to
> colocate with their December meeting. Some mightily
> interesting results could come of that.

> --
> D. C. Sessions
> dc.sessions@tempe.vlsi.com

 
Received on Wed Mar 4 16:35:43 1998