Proposed Golden IBIS Parser checks

All,

I'd like to raise for discussion some enhancements I would like to have made
to the Golden IBIS Parser.

My goal is to elevate the quality of IBIS models being produced by having
IBISCHK perform additional sanity checks. Many of the enhancements proposed
below would detect flaws in models which render the model unusable for some
simulations.

I am proposing that we enhance the Golden IBIS Parser instead of creating a
separate utility since the Golden IBIS Parser already performs some sanity
checking and it is already accepted as an authoritative tool. (I have
actually had some model creators refuse to fix models because "IBISCHK
doesn't complain".)

Proposed enhancements:

1) Generate an error if, in the [Ramp] section, either the numerator or the
   denominator of dV/dt is zero or negative.

2) Generate a warning if the values of Vinl or Vinh are equal to or beyond
   their respective voltage rail.

   Although I believe it possible for a device to have Vinl or Vinh equal to
   the voltage rail, my impression is that those devices are rare.

2) Generate at least a warning if the Pullup or Pulldown V/I table indicates
   that current is always flowing in one direction. In other words, the V/I
   table does not have an entry with zero current or, by interpolation, the
   current is never zero in the range of the voltages listed.

   I think a warning should be generated even if the current would be zero
   when extrapolated to a voltage beyond those listed in the table because I
   believe that V/I tables should be complete and should not force a simulator
   to guess values and, to me, extrapolation beyond the voltages listed in the
   table is a guess.

3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min,
   and Max columns in the Pullup or Pulldown V/I tables be the same (say
   within a microvolt)? I suggest that a warning be generated if they are
   not.

4) Related to a topic recently discussed on the reflector, I suggest that an
   error be generated if a differential pin (a pin referenced in the
   [Diff pin] section) is connected to one of the reserved models (POWER, GND,
   or NC).

5) I suggest generating a warning if multiple pins in a [Pin] section have the
   same signal name yet use different models.

   This is to help catch human error when entering [Pin] sections by hand on
   parts with hundreds of pins. This would catch mistakes like having 25 Vcc
   pins where 24 are correctly using model POWER and one is mistakenly using
   model GND.

I realize that some of these enhancements might need a BIRD to be issued so
that the IBIS specification specifically mentions values that are illegal.

Regards,
Matthew Flora
Senior Engineer
HyperLynx
(425) 869-2320 PH
(425) 881-1008 FAX
mbflora@hyperlynx.com
Received on Wed Nov 4 10:07:48 1998