It is TRUE,
At 04:15 PM 10/7/98 -0700, Chris Rokusek wrote:
>Ibisians,
>
>I have a Quiz, True or False:
>
>The models of pins referenced by a [Diff Pin] keyword may NOT be of any
>of the following:
>
> Terminator,
> Series,
> Series_switch.
>
>Chris
>
>I think the spec implicitly says TRUE...
>
>|==========================================================================
===
>| Keyword: [Diff Pin]
>| Required: No
>| Description: Associates differential pins, their differential
>threshold
>| voltages, and differential timing delays.
>| Sub-Params: inv_pin, vdiff, tdelay_typ, tdelay_min, tdelay_max
>| Usage Rules: Enter only differential pin pairs. The first column,
>[Diff
>| Pin], contains a non-inverting pin name. The second
>column,
>| inv_pin, contains the corresponding inverting pin name
>for
>| I/O output. Each pin name must match the pin names
>declared
>| previously in the [Pin] section of the IBIS file. The
>third
>| column, vdiff, contains the specified output and
>differential
>| threshold voltage between pins if the pins are Input or
>I/O
>| model types. For output only differential pins, the
>vdiff
>| entry is 0 V. The fourth, fifth, and sixth columns,
>| tdelay_typ, tdelay_min, and tdelay_max, contain launch
>delays
>| of the non-inverting pins relative to the inverting
>pins. The
>| values can be of either polarity.
>|
>| If a pin is a differential input pin, the differential
>input
>| threshold (vdiff) overrides and supersedes the need for
>Vinh
>| and Vinl.
>|
>| If vdiff is not defined for a pin that is defined as
>requiring
>| a Vinh by its [Model] type, vdiff is set to the default
>value
>| of 200 mV.
>|
>| Other Notes: The output pin polarity specification in the table
>overrides
>| the [Model] Polarity specification such that the pin in
>the
>| [Diff Pin] column is Non-Inverting and the pin in the
>inv_pin
>| column is Inverting. This convention enables one
>[Model] to
>| be used for both pins.
>|
>| Column length limits are:
>| [Diff Pin] 5 characters max
>| inv_pin 5 characters max
>| vdiff 9 characters max
>| tdelay_typ 9 characters max
>| tdelay_min 9 characters max
>| tdelay_max 9 characters max
>|
>| Each line must contain either four or six columns. If
>"NA" is
>| entered in the vdiff, tdelay_typ, or tdelay_min columns,
>its
>| entry is interpreted as 0 V or 0 ns. If "NA" appears in
>the
>| tdelay_max column, its value is interpreted as the
>tdelay_typ
>| value. When using six columns, the headers tdelay_min
>and
>| tdelay_max must be listed. Entries for the tdelay_min
>column
>| are based on minimum magnitudes; and tdelay_max column,
>| maximum magnitudes. One entry of vdiff, regardless of
>its
>| polarity, is used for difference magnitudes.
>|--------------------------------------------------------------------------
--- >[Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max >| > 3 4 150mV -1ns 0ns -2ns | Input or I/O >pair > 7 8 0V 1ns NA NA | Output* pin >pair > 9 10 NA NA NA NA | Output* pin >pair >16 15 200mV 1ns | Input or I/O pin pair >20 19 0V NA | Output* pin pair, tdelay = 0 >22 21 NA NA | Output*, tdelay = 0 > | * Could be Input or I/O with >vdiff = 0 >| >|====================================================================== > --------------------------------------------------------- Have a great day.... Kellee Crisafulli at HyperLynx SI,EMC,X-talk and IBIS tools for the Windows platform E-mail: <mailto:kellee@hyperlynx.com> web: <http://www.hyperlynx.com> ---------------------------------------------------------Received on Thu Oct 8 12:30:42 1998
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