Re: Dual drive modeling

Fabrizio,

If the stronger driver turns off based on a timing delay (rather than
voltage feedback) then a multi-stage driver using [Driver Schedule] can be
used which is simply multiple drivers in parallel, each driver having
distinct timing characteristics.

The only keyword supporting any voltage feedback is Bus_hold. To my
knowledge this construct was not really designed with a multi-stage driver
application in mind.

Chris Rokusek
Viewlogic Systems

-----Original Message-----
From: fabrizio zanella <fzanella@fishbowl02.lss.emc.com>
To: ibis@vhdl.org <ibis@vhdl.org>
Date: Friday, April 02, 1999 8:03 AM
Subject: Dual drive modeling

>I was speaking to a semiconductor company yesterday which makes a new
logic,
> AVC, which has dynamic output control (or dual drive). Strong drive is
>provided for 3/4 of the swing, then the output impedance is dynamically
>lowered during signal transition, which eliminates overshoot, undershoot.
>Does anyone know whether this type of driver can be modeled in IBIS v3.2?
>
>thanks and regards,
>
>Fabrizio Zanella
>EMC, Hardware Engineering
>fzanella@emc.com
>508-435-2075, x4645
>
>
Received on Fri Apr 2 10:29:04 1999