Dear Gentleman ,
I have some doubts about the C_comp value inside the IBIS model.
I hope you can help me.
I read this definition inside the IBIS spec :
C_comp defines the silicon Die capacitance ..
but I did not understand well.
This is the value I obtain from a parasitic extraction from layout
or it is
the input or output capacitance I can
read inside my chip Spec ?
Thank you in advance for your help , Your Sincerelly
Riccardo Giordani
Received on Fri Nov 5 08:30:11 1999
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