DATE: 4/18/00
SUBJECT: 4/14/00 EIA IBIS Open Forum Meeting Minutes
VOTING MEMBERS AND 2000 PARTICIPANTS LIST:
3Com Roy Leventhal
Agilent (EEsof, etc.) Mark Chang
Hewlett Packard Paul Gregory
Applied Simulation Technology Raj Raghuram*, Norio Matsui, Fred Ballesteri
Avanti Nikolai Bannov
Cadence Design Mike LaBonte, Todd Westerhoff, Ian Dodd*,
Donald Telian, Patrick Dos Santos
Cisco Systems Syed Huq, Irfan Elahi, John Fisher
Compaq [Bob Haller], Peter LaFlamme, Ron Bellomio,
Shafier Rahman, Doug Burns
Cypress (Rajesh Manapat)
EMC Corporation (Fabrizio Zanella),
Fairchild Semiconductor Craig Klem
H.A.S. Electronics (Haruny Said)
HyperLynx (& Pads Software) Matthew Flora*, Kellee Crisafulli, Gene Garat,
John Angulo, Al Davis, Lynne Green
IBM Michael Cohen*, Greg Edlund*
Incases Werner Rissiek
Innoveda (Viewlogic Systems) Chris Rokusek, Guy de Burgh*, Jun Tian,
Cary Mandel, Brad Griffin, (Jon Powell)
Intel Corporation Stephen Peters*, Arpad Muranyi*, Will Hobbs,
Richard Mellitz
LSI Logic (Larry Barnes)
Mentor Graphics (& Veribest) Bob Ross*, Tom Dagostino, Malcolm Ash,
Kim Owen, Jean Oudionot, Sherif Hammad,
Hazam Hegazy, Weston Beal*
Mitsubishi Shahab Ahmed
Molex Incorporated Gus Panella
Motorola Ron Werner*
National Semiconductor Milt Schwartz*
North East Systems Associates Edward Sayre, Tony Sinker
NEC (Hiroshi Matsumoto)
Nortel Networks Steve Coe, Calvin Trowell*, Hassan Ali
Philips Semiconductor D.C. Sessions
(& VLSI Technology)
Quantic EMC (Mike Ventham)
Siemens AG Bernhard Unger, Gerald Bannert
SiQual Scott McMorrow, Wis Macomson
Texas Instruments Stephen Nolan, Ramzi Ammar, Mac McCaughey,
Thomas Fisher, Jean-Claude Perrin*,
Jean-Yves Oberle
Time Domain Analysis Systems Dima Smolyansky, Steven Corey
Via Technologies (Weber Chuang)
OTHER PARTICIPANTS IN 2000:
Actel Corp. Silvia Montoya
Advansis Mikio Kiyono
Aerospatiale Matra CCR Lionel Dreux, Julien Boullie
Alcatel (Lannion, Bell) Daniel Peron, Steven Criel
Brocade Communications Robert Badal
EIA Cecilia Fleming*
Fraunhofer Institute Michael Kurten
Jet Propulsion Lab John Treichlew
Rockwell Collins Ron Hau
Signals & Systems Engineering Tom Hawkins
ST Micorelectronics Fabrice Boissiere, Pierre Saintot
Sun Microsystems Victor Chang
Thomson-CSF Savenrio Lerose, Pascal Vaslin, Thierry Zak,
Sylvie Lasserre
Transfer Hans Klos, Wilco Hamhuis
Xilinx, Inc. Susan Wu
In the list above, attendees at the meeting are indicated by *. Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.
Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as
follows:
Date Bridge Number Reservation # Passcode
May 5 , 2000 (916) 356-9200 3-373073 1535639
May 26, 2000 (916) 356-9200 3-373074 77923642
June 8, 2000 - DAC 2000 IBIS Summit Meeting (No Bridge)
All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out
7 days before each Open Forum and meeting minutes out within 7 days after.
When you call into the meeting, ask for the IBIS Open Forum hosted by Will
Hobbs and give the reservation number and passcode.
NOTE: "AR" = Action Required.
-------------------------------- MINUTES -------------------------------------
INTRODUCTIONS AND MEETING QUORUM
Weston Beal attended from Mentor Graphics, and Greg Edlund called in from
IBM.
MEMBERSHIP UPDATE AND TREASURER'S REPORT
Bob Ross reported that we have 27 Members to date this year. Cecilia Fleming
and Bob are checking or following up on the payment status of some others.
REVIEW OF MINUTES AND AR'S
The March 17, 2000 and March 31, 2000 IBIS Minutes were approved.
The AR's will be discussed during the meeting.
MISCELLANY/ANNOUNCEMENTS
None.
PRESS AND WEB PAGE UPDATES
Bob Ross reported that Bob Haller authored "The Nuts and Bolts of Signal-
Integrity Analysis" in the March 16, 2000 issue of EDN, pp. 61-78, in which
IBIS is mentioned in several locations. The article is also available at:
http://www.ednmag.com/ednmag/reg/2000/03162000/06ms603.htm
Bob reported that in response to the SI reflector discussion regarding general
FAQ's on signal integrity, a High Speed Digital Design Topics page now has
a "Using IBIS Models" link with general information and other links:
http://www.scs.ch/~andrew/hsdd/hsdd.html
The Topic Coordinator is Kim Helliwell, and Bob and Abe Riazi are Topic
Peers. Comments and assistance in developing this further are welcome.
Bob also reported that the participants list has been updated with the
Innoveda change from Viewlogic and more information from SiQual, and
upcoming events have been updated.
The Poster page also has been updated with Innoveda and SiQual logos.
Bob also noted that the EIA web site will change, but the existing address
will be retained as an alias.
NEW MODELS AVAILABLE, LIBRARY UPDATE
Bob Ross mentioned that more Motorola IBIS models can be found by searching
for IBIS. This probably works for several other semiconductor vendors as
well.
OPENS FOR NEW ISSUES
None.
INTERNATIONAL/EXTERNAL PROGRESS
- IEC 62014-1 (IBIS Version 3.2) - Cecilia Fleming reported no further
information regarding the progress of this document. IEC approved the
document in December 1999, and it is awaiting publication.
- pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits
(IMIC) - Bob Ross reported that Dr. Hideki Fukuda has been elected Leader,
Takeshi Watenabe from NEC, Vice Leader. The group has been following the
IBIS futures developments and is interested in the nodal approaches based on
the fact that the Silicon Vendors have Spice models. The group wants to
continue to work with the IBIS Open Forum. Bob forwarded a letter to the
IBIS Futures committee.
- IEC PWI 93-1 Models of Integrated Circuits for EMI Behavioral Simulation
(formerly designated as IEC 93/67/NP IBIS and EMC Simulation) - Jean-Claude
Perrin reported that he plans to revise the document by the end of May 2000
and then make it available to the IBIS committee. It will contain an IBIS
style syntax. Bob Ross noted that this was discussed at the European IBIS
Summit, and the presentation contains some information about the approach.
- JEDEC JC-16 - Bob Ross reported that JEDEC, IBIS, Silicon Tech and Intel
are co-sponsoring a free class on IBIS on Wednesday, April 26, 2000, 8 AM to
noon at the Silicon Valley Convention Center. The signup deadline has
passed. Bob received an estimate of 180 attendees based on 157 signups at
the deadline. Ron Werner asked, and Bob noted that class material will be
uploaded and be made available. Arpad Muranyi will be the instructor.
DATE2000 IBIS SUMMIT FEEDBACK
Bob Ross commented that he had good feedback regarding the informative
content of the European IBIS Summit Meeting held on March 31, 2000 in Paris,
France. DATE 2001 is scheduled in Munich, Germany, March 12-16, 2001. We
will probably plan another European IBIS Summit Meeting at that time.
DAC2000 IBIS SUMMIT MEETING
Bob Ross reported that DAC 2000 is being held at the Los Angeles Convention
Center. The trade show portion is held Monday through Wednesday, June 5-7,
2000. The IBIS Summit Meeting is planned Thursday, June 8, 2000 from the
morning through early afternoon.
The main topics will be our annual election of officers and the connector
Specification. Other topics will be related to on going IBIS futures
activities.
A room has been reserved at the Hyatt Regency Hotel, about six blocks away
from the Convention Center and near several other hotels serving the
conference. A room further away had been reserved, but that reservation
will be cancelled.
Guy de Burgh will be handling the signups. The first notice is expected to
be sent out next week. Michael Cohen asked if the agenda had been set. Bob
noted that we will be asking for presentations, and the agenda will be formed
later based on presentations that are contributed.
ACCURACY HANDBOOK
Greg Edlund reported that as a result of recent SI list interest, he updated
the former IBIS Accuracy Specification and sent it to people on the Accuracy
committee. It is now renamed I/O Buffer Accuracy Handbook. It contains
SPICE model and IBIS datasheet checklists. Greg expects to release the
document next week in .pdf format after responding to some review comments.
Greg also noted that his company is building an accuracy test board. He
is also working on an accuracy trailer and also on an accuracy report that
discusses laboratory versus Spice and laboratory versus behavioral simulation.
He is awaiting internal approval regarding publishing the data. Greg expects
the board and report within several months.
COOKBOOK STATUS
Stephen Peters had no report.
IBIS MODEL REVIEW COMMITTEE DISCUSSION
Matthew Flora reported that models from Texas Instruments and Motorola have
been sent out for review.
BIRD62.6 ENHANCED CHARACTERIZATION OF RECEIVER THRESHOLDS
Bob Ross introduced BIRD62.6 by noting that this has been discussed at recent
meetings. At the last meeting we made some changes, thus delaying a planned
vote to allow for the two-week review period.
Stephen Peters and Bob noted some of the changes. The last change was to
convert Input_edge_rate subparameters (specified as slew rates) to time
subparameters Tslew_ac and Tdiffslew_ac since they related to times crossing
the Vin*_ac and Vdiff_ac thresholds.
Bob called for a vote. BIRD62.6 was approved 10 Yes, 0 No, and 1 Abstention.
BIRD66 - [Model Spec] Vref ADDITION
Bob Ross reintroduced BIRD66 by noting that it opens the door to consider
related extensions. BIRD66 adds timing test load Vref min and max values.
We probably will not add the Rser extension to the timing test load even
though it is in some JEDEC documents because JEDEC is moving toward the
IBIS timing test load specification. We do need to consider whether to add
independent loads for rising and falling waveforms, as done in some PCI
specifications. Finally, we could also add min and max values for Rref and
Cref. Weston Beal noted that some buffers have different Cref values for
min and max conditions.
There are two points of view regarding application of timing test loads. It
could be used for a common time adjustment value (to calibrate the simulator
delays to the specification delays. From this perspective, only one test at
typical conditions is needed since the other time is already time correlated.
This also relates to how a random part might be measured for compliance to
the timing specifications.
The other point of view that is being implemented in models is that corner
different timing test loads are used for the min and max corners for a wider
range of loads. These points of view need to be understood and resolved.
Reflector discussion on BIRD66 is needed.
IBIS VERSION 4.0
During the above discussion Stephen Peters asked which BIRDs are needed for
IBIS Version 4.0. Should there be a cutoff list? Bob Ross noted that we
should process the open BIRDs. We also need a BIRD for simultaneous switching
noise and perhaps a few other BIRDs. Bob will work on the simultaneous
switching noise proposal per Dr. Unger's January 31, 2000 IBIS Summit meeting
presentation.
BUG34 - No Error Reported for Missing V/I Tables in Output Buffers
Bob Ross sent out to the IBIS reflector BUG34 for review and discussion. He
had planned to issue other BUG reports, but still has not yet generated them.
For background, BUG34 had been introduced in January 1999 and updated in
October 1999. It has been classified as an "Annoying" bug and discussion on
it had been deferred while we worked on other issues including IBIS Version
3.2 ratification.
Matthew Flora, who authored BUG34, stated that he encountered the problem
while checking actual models. The IBIS parser gave no error or warning
messages for a non-functioning output model that did not have any [Pulldown] or
[Pullup] tables.
Matthew's revised BUG34 proposed a number of Warning versus Error messages
since there were cases where [Rising Waveform] tables and [Falling Waveform]
tables or [Submodel] data introduced the correct responses, even for an
incorrect model type designation. Bob read one Warning message for a missing
[Pullup] table for an output buffer. After some discussion, the group
generally supported the longer, more user friendly messages. Matthew noted
that such a message would not occur very often.
Bob did feel that the "Perhaps it should be." statement was excessive and the
wording could be tightened up slightly. Also, Bob commented that the Warning
for missing both the [Pullup] table and [Pulldown] table was probably not
necessary since individual messages regarding each of the tables could be
issued. That should give adequate warning that there is an inconsistency.
Bob will work with Matthew off-line to discuss details of the message. Then
Matthew plans to issue an updated BUG34.
CONNECTOR PROPOSAL REVIEW (CONTINUED)
Bob Ross noted that another review meeting occurred on Tuesday, April 11, 2000
with Gus Panella, Bob and Guy de Burgh. Matthew Flora stated that Version
0.941 for the document has been uploaded in
http://www.eda.org/pub/ibis/connector/
with most of the changes mentioned in the March 17, 2000 IBIS teleconference
meeting.
Most of the discussion concerned the required and optional parameters of
[Begin_Cn_Model] for the three cases previously defined:
Physical connectors using a Defined Physical Pin
Physical connectors using Swath Matrix ([Begin_Cn_Swath])
Auto generated connectors using the Swath Matrix and [Begin_Cn_Auto_Map].
Currently, [Begin_Cn_Model] requires the names ModelPinMap and ModelPhyMap.
However, there are cases where one or the other is not used. Bob mentioned
that "NA" could per permitted for cases where [Begin_Cn_Pin_Map] or
[Begin_Cn_Phy_Map] do not need to be defined.
Most of the discussion concerned the Swath matrix details. Unlike the
package model syntax in IBIS Version 3.2 (and Version 2.1) which document the
matrix structures using actual alphanumeric pin numbers, connector model
matrices are described indirectly using indices starting sequentially with
"1". The Swath matrix format supports specifying extra rows and columns which
would be terminated during simulation by the [Cn_Z] resistance value. For
example, 2 additional columns could be specified on each end of a 2 by 5
connector. The matrices would have 18 entries (10 for the connector pins, and
4 at each end for the extra connections terminated by [Cn_Z] value.
Later, Bob noted that pin cross-over (e.g., side A pin 1 connecting to side B
pin 2, and visa versa) had been mentioned, but the existing syntax did not
appear to support this. An addition might be made for this.
The next meeting is planned on Wednesday, April 19, 2000. The focus will be
the input syntax for number of pins, rows, and columns and also the
[Begin_Cn_Auto_Map] mode. The intent is to assure that there is syntax
consistency for all situations and that the ability to enter conflicting
information is minimized.
IBIS FUTURES (IBIS-X, API, BIRDxx)
Stephen Peters reported on an all day meeting held in Oregon on Thursday,
March 30, 2000 with eight people on IBIS Future directions. Arpad Muranyi
sent out minutes to the group. Stephen listed a few of the conclusions:
Transistor level behavioral support is needed.
The ability for simulator vendors to encrypt models was discussed as a
needed option
A new specification is required.
The meeting covered in a number of topics including
Review of Arpad's IBIS futures question SI-list reflector responses
Arpad's need for die to pad interconnection. (Bob Ross noted that IMIC also
does this already in nodal syntax.)
Stephen's IBIS-X requirements
Scott McMorrow's proposal for a general way to connect pin internal models.
Al Davis' proposed macro language. This generated great interest.
The next set of actions is to work on the macro language and syntax for nodal
connections and netlist connections. The description language would also
included signal integrity specification and information parameters.
The AR's for the group were:
Al Davis make some refinements per the discussion
Al Davis write a proposal for a wrapper syntax around the model
Arpad Muranyi write a proposed syntax for the header section
Since the meeting covered much more than noted above, Bob suggested that
Stephen send the minutes to the IBIS reflector.
Michael Cohen mentioned that D.C. [Sessions] brought up the idea of using
VHDL_A or Verilog_A as the future of IBIS since simulators already
process these or have access. This would yield more rapid adoption
versus defining a new language.
Bob indicated that XML formats for Web based syntax had also been proposed.
He and Weston Beal referenced a link with a new XML based Timing Diagram
Markup Language (TDML) at:
So we might be motivated to consider using a similar XML format.
Bob opened the discussion regarding encryption. Stephen noted that he
sees technologies that would require hiding the internal intellectual property
structures regardless of format. The committee just introduced the idea.
Initially, Stephen thought that EDA vendors will do the de-encryption. Raj
Raghuram commented that this defeats the purpose of IBIS. Michael added that
he has had bad experience with encrypted models.
Stephen had planned for another meeting, but its details are still open.
BIRD61.1 - ENHANCED CHARACTERIZATION OF RECEIVERS
Stephen noted that we will probably reject BIRD61.1 since the behavioral
receiver modeling approach seems more promising.
BIRD64.1 - PACKAGE MODE SELECTOR
Not Discussed.
BIRD65 - C_comp REFINEMENTS
Not Discussed.
NEW TECHNOLOGIES
Not discussed.
NEXT MEETING:
The next teleconference meeting will be on Friday, May 5, 2000 from 8:00 AM
to 10:00 AM.
==============================================================================
NOTES
IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
bob_ross@mentor.com
Modeling Engineer, Mentor Graphics
8005 S.W. Boeckman Road, Wilsonville, OR 97070
VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515
sjpeters@ichips.intel.com
Senior Hardware Engineer, Intel Corporation
M/S JF1-209
2111 NE 25th Ave.
Hillsboro, OR 97124-5961
SECRETARY: Guy de Burgh (805) 988-8250, Fax: (805) 988-8259
gdeburgh@innoveda.com
Senior Manager, Innoveda
1369 Del Norte Rd.
Camarillo, CA 93010-8437
LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259
jpowell@innoveda.com
Senior Scientist, Innoveda
1369 Del Norte Rd.
Camarillo, CA 93010-8437
WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504
shuq@cisco.com
Signal Integrity Engineer, Cisco Systems
170 West Tasman Drive
San Jose, CA 95134-1706
POSTMASTER: Matthew Flora (425) 869-2320, Fax: (425) 881-1008
mbflora@hyperlynx.com
Senior Engineer, HyperLynx, Inc.
114715 N.E. 95th Street
Redmond, WA 98052
This meeting was conducted in accordance with the EIA Legal Guides and EIA
Manual of Organization and Procedure.
The following e-mail addresses are used:
ibis-request@eda.org
To join, change, or drop from either the IBIS Open Forum Reflector
(ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org)
or both. State your request.
ibis-info@eda.org
To obtain general information about IBIS, to ask specific questions
for individual response, and to inquire about joining the EIA-IBIS
Open Forum as a full Member.
ibis@eda.org
To send a message to the general IBIS Open Forum Reflector. This
is used mostly for IBIS Standardization business and future IBIS
technical enhancements. Job posting information is not permitted.
ibis-users@eda.org
To send a message to the IBIS Users' Group Reflector. This is
used mostly for IBIS clarification, current modeling issues, and
general user concerns. Job posting information is not permitted.
ibischk-bug@eda.org
To report ibischk2/3 parser bugs. The Bug Report Form Resides on
eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.
To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt,
/pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
respectively.
Information on IBIS technical contents, IBIS participants, and actual
IBIS models are available on the IBIS Home page found by selecting the
Electronic Information Group under:
http://www.eia.org/eig/ibis/ibis.htm
Check the pub/ibis directory on eda.org for more information on previous
discussions and results. You can get on via FTP anonymous.
==============================================================================
Received on Tue Apr 18 08:59:49 2000
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