To All:
Below is the planned Agenda. We have room for discussions,
and we also may end the meeting early.
Please contact Milt Schwartz at schwartz@nsc.com to sign
up, if you have not done so.
Confirm the room location at the hotel. It may be listed
under some sponsoring organization such as IEC, DesignCon,
National Semiconductor, etc.
Bob Ross
Mentor Graphics
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AGENDA, IBIS SUMMIT MEETING
JANUARY 31, 2000
Westin Hotel, Ballroom E
Santa Clara Convention Center
Santa Clara, California
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8:00 AM Refreshments & Sign In
8:30 AM Introductions
- Welcome to Summit
- Introductions
- IBIS Booth #1039 Placards
- Opens for Issues, Discussion
9:00 AM Model Designs: Tables and Equations
Lynne Green, HyperLynx
9:30 AM Simutaneous Switching Noise Modeling
Bernhard Unger, Siemens
10:00 AM Break
10:15 AM IBIS Booth #1039 - Connector Demonstration
Bob Haller, Compaq
10:20 AM Connector Model Specification (& Discussion)
Gus Panella, Molex
11:30 AM Using Statistical Methods to Characterize Receivers to Determine
the Applicability of Receiver Modeling Standardization
Richard Mellitz, Intel
12:00 PM Lunch Ballroom D (Hosted by National Semiconductor)
Westin Hotel
1:00 PM Input Receiver Behavioral Modeling (& Discussion)
Donald Telian, Intel
2:15 PM Extendable Macro Structures of IBIS
Al Davis, HyperLynx
2:45 PM Break
3:00 PM Ideas for Future IBIS Versions
Arpad Muranyi, Intel
3:30 PM Discussion - Future of IBIS
Stephen Peters, Intel
4:00 PM Other Topics
4:45 PM Concluding Items
- Date2000 IBIS Summit
- Next Meeting February 25, 2000
- ??
5:00 PM End of IBIS Summit Meeting
5:00 PM JEDEC/IBIS Working Group Meeting Plans
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Received on Mon Jan 24 13:26:39 2000
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