Your answer "A" is the way I would do it. You're probably not set
up with the proper stuff to do B until you do A anyway. And I don't
think IBIS even supports C. So I think you're stuck with A. And I think
that's what Arpad was also saying to do.
Kim
Robert Haller wrote:
>
> Syed and Arpad,
> Thanks for you replys. Let me try and clarify the question.
>
> I have a 'good' IBIS model (with all the IV curves,VT tables and package
> paramaters) that
> can be read into the parser for ONE Bidirectional pin (for each technology
> type). I also have
> an asci text file for a FPBA which tells me what pin type's (Input, Output,
> BI_directional)
> and what type of driver (hstl,lvttl,lvds). Now I have the task of assigning
> the correct pins
> (there are a lot of them) to the correct models. (It isn't done for me
> because the device's I/O's are programmable).
> I wasn't sure whether I should do A,B or C;
>
> A. Create an unique Input model (called 6ma_LVTTL_INPUT)from the I/O model
> by dropping
> everything BUT the c_comp,vih,Vil, gndclamp, powerclamp
> Create an Output model (called 6ma_LVTTL_OUTPUT) from the I/O model by
> dropping everything
> but the Vmeas,C_comp, Pulldown, Pullup ... etc
> Duplicate and Leave I/O model alone (6ma_LVTTL_IO).
> Then in the pin template make the appropriate call to the appropriate
> model.
>
> B. Use the model_selector keywork (somehow ?) for each pin and call the
> correct I/V curves and tell it
> whether its an INPUT or OUTPUT or I/O
>
> C. Or another better way to do it (like in my old internal 'dec' tool) that
> you call out a part family and
> the simulator looks at the physical database body description and can
> tell which are I's which
> are O's and which are BI's and assigns the correct family and function to
> each pin.
>
> I thought if someone had already figured out the best way to do a
> programmable I would not have to
> repeat the exercise.The best way for me to understand how to do it would be
> to see an example model
> of an entire FPGA that somebody already did theses assignments in a succient
> way.
> bob
>
> -----Original Message-----
> From: Muranyi, Arpad [mailto:arpad.muranyi@intel.com]
> Sent: Monday, May 01, 2000 1:49 PM
> To: ibis@eda.org
> Subject: RE: Stupid question
>
> Syed,
>
> I think his question is a little different. It seems to that
> he wants to know what he should do with the I/O cells which
> are used as input, or output.
>
> Bob,
>
> This is what you should do. Generate four I-V curves from the
> ASIC cells. (pulddown, pullup, GND relative 3-state, and Vcc relative
> 3-state). When you have an I/O make an I/O IBIS model from these,
> that is do the usual subtraction method to generate the [Pulldown]
> and [Pullup] tables. The 3-state curves go into the clamp curves
> as usual, cut at the appropriate points to avoid double counting.
>
> When you need an input only model, keep these clamp curves, but
> discard the [Pullup], [Pulldown] curves and the V-t curves (and ramps).
>
> When you need an output only model, discard the clamp curves, and
> use the unsubtracted [Pulldown] and [Pullup] curves (keeping the V-t
> and ramp also).
>
> Arpad Muranyi
> Intel Corporation
> ======================================================================
>
> -----Original Message-----
> From: Syed Huq [mailto:shuq@cisco.com]
> Sent: Monday, May 01, 2000 10:33 AM
> To: ibis@eda.org; rhaller@cereva.com
> Subject: Re: Stupid question
>
> Since this is an FPGA, the user needs to generate his/her own [Pin] list
> table
> based on your configuration. This [Pin] list would point to the appropriate
> buffer models. Then attach the buffer models to the modified [Pin] list to
> create the full component model.
>
> You can even use the [Model selector] scheme from v3.2 but that depends if
> your simulator supports it.
>
> Regards,
> Syed
> Cisco Systems, Inc
>
> >
> > Dear IBIS users,
> > I am trying to ascertain the optimal way to configure a FPGA IBIS
> model.
> > I have input only, output only and Bi-directional I/O's while the
> supplier's
> > model provides
> > a generic I/O model. If someone could email me an optimized example I
> would
> > be most grateful.
> >
> > Regards,
> > Bob Haller
-- Kim Helliwell Senior CAE Engineer Acuson Corporation Phone: 650 694 5030 FAX: 650 943 7260Received on Mon May 1 15:38:59 2000
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