Re: Proposal for treatment of BUG54...

Michael:

Here are some thoughts.

I think your rule 1 proposal makes sense for the purposes of
ibischk3 testing. However, it might
still be complicated. The revised rule would be to not
perform the test if NA's exist for all entries of either
the [Pulldown] or [Pullup] tables. The *_Open* cases have
to be treated separately with a different rule. Many
models with typical only clamps exist, so NA's can still
exist in the typ columns only.

In practice, the EDA tools might apply rule 2 in some manner,
but ibischk3 cannot perform the check.

Anyway, there are a lot of implications. I would favor a
proposal that removes erronous Warnings rather than tries
to sort out some possible acceptable combinations that
are not formally specified.

Bob Ross
Mentor Graphics

"Mirmak, Michael" wrote:
>
> In Friday's IBIS Forum, I took an AR to examine how the parser treats
> IBIS files where all the min/max parameters are set to NA (rather than
> just the min/max V-I curves). Recall that BUG54 was filed in order to
> correct the parser's treatment of models missing a [Pullup] section and
> max/min V-I curves. The parser currently shows warnings regarding the
> inability of such a model to drive the buffer delay test load through
> the specified Vmeas point.
>
> The parser continues to give errors on the missing max/min V-I curves,
> regardless of whether ramps, c_comp or voltage range min/max values
> are present or absent. I have enclosed an additional example below.
>
> Therefore, we may conclude that the parser is only looking for V-I curves
> in the min & max columns (for models without a [Pullup] section) to use
> in determining whether the model can satisfy the buffer delay voltage
> requirements.
>
> To decide how to resolve BUG54, we need to decide how the parser should
> treat the keyword "NA" for this case. The spec unfortunately allows two
> interpretations of "NA," according to the two rules below:
>
> Rule 1) "NA" means "no data" -- no assumption is to be made as to
> the operation of the modeled device in those columns under those
> conditions. This is the intent behind using NA to entirely replace
> a column of V-I, t-V, ramp, c_comp or operating condition data.
>
> Rule 2) "NA" means "no explicit data" -- data is not given for
> this particular condition in this particular column, but the state
> of the device at this point is to be inferred from the surrounding
> context by the sim tool. This is the normal usage of NA, when
> mixed into a column of V-I or t-V data. This is also the reason
> behind prohibiting the use of NA as a starting or ending point in
> a column of data.
>
> Currently, the parser checks V-I curves using Rule 2 above for models
> where partial data is available in all three columns. Rule 1 is used
> for most models where NA completely replaces V-I data in a min or max
> column.
>
> BUG54 was filed because the parser incorrectly applies Rule 2 for models
> where the keyword [Pullup] is missing and entire V-I columns are
> replaced by NA. For any other case where an entire column is missing,
> Rule 1 is the only rule applied.
>
> So, to "fix" BUG54, I would suggest simply eliminating the warning
> messages and applying Rule 1 to all models without a [Pullup] section
> and without min/max V-I curves. This makes the parser self-consistent
> and also gives sim tool vendors the same flexibility about the treatment
> of NA as they currently have. No additional cases or interpretation
> would be required.
>
> Any suggestions or advice? I will incorporate any consensus here into a
> revised BUG54, which I will distribute for posting a week before the next
> IBIS meeting (March 30).
>
> Thanks!
>
> - Michael Mirmak, Intel Corp.
>
> |***********************************************************************
> |
> [IBIS Ver] 3.2
> [File Name] bug54a.ibs
> [File Rev] 0.0a
> [Date] 05-March-2001
> [Source] File created from specification
> [Notes] Using the IBISCHK3 v3.2.5 & v3.2.6 parsers, the
> following file will show two misleading warnings
> related to the buffer delay fixture.
> |
> [Disclaimer]
> (C) Copyright 2001 Intel Corp.
> All rights reserved
> This model is for demonstration purposes only,
> |
> [Component] GENERIC_IBIS
> [Manufacturer] Intel Corp.
> |
> [Package]
> | typ min max
> R_pkg 6.0mO NA NA
> L_pkg 5.0nH NA NA
> C_pkg 1.0pF NA NA
> |
> |
> [Pin] signal_name model_name R_pin L_pin C_pin
> 1 TestSignal1 TestModel1
> |
> |************************************************************************
> |
> [Model] TestModel1
> Model_type I/O_open_sink
> |Model_type I/O
> Polarity Non-Inverting
> Enable Active-Low
> |
> Vinl = 800mV
> Vinh = 2.0V
> |
> Cref = 0F
> Rref = 25ohms
> Vref = 5.0V
> Vmeas = 2.5V
> |
> C_comp 5.00pF NA NA
> |
> [Temperature Range] 27.00 NA NA
> [Voltage Range] 5.0V NA NA
> |
> |[Pullup]
> || voltage I(typ) I(min) I(max)
> ||
> | -5.0000 0.0m NA NA
> | -4.0000 0.0m NA NA
> | 0.0000 0.0m NA NA
> | 5.0000 0.0m NA NA
> | 10.0000 0.0m NA NA
> |
> |
> [Pulldown]
> | voltage I(typ) I(min) I(max)
> |
> -5.0000 -40.0m NA NA
> -4.0000 -39.0m NA NA
> 0.0000 0.0m NA NA
> 5.0000 200m NA NA
> 10.0000 400m NA NA
> |
> |
> [GND Clamp]
> | voltage I(typ) I(min) I(max)
> |
> -5.0000 -3900.0mA NA NA
> -0.7000 -80.0m NA NA
> -0.6000 -22.0m NA NA
> -0.5000 -2.4m NA NA
> -0.4000 0.0A NA NA
> 5.0000 0.0A NA NA
> |
> [Power Clamp]
> | voltage I(typ) I(min) I(max)
> |
> -5.0000 4450.00m NA NA
> -0.7000 95.0m NA NA
> -0.6000 23.0m NA NA
> -0.5000 2.4m NA NA
> -0.4000 0.0m NA NA
> 0.0000 0.0m NA NA
> |
> [Ramp]
> |variable typ min max
> dV/dt_r 2.20/1.06n NA NA
> dV/dt_f 2.46/1.21n NA NA
> R_load = 300ohms
> |
> |
> |************************************************************************
> [End]
 
Received on Wed Mar 7 17:11:12 2001