Subject: RE: Number of Significant Digits
From: Peters, Stephen (stephen.peters@intel.com)
Date: Wed Feb 27 2002 - 12:11:24 PST
Hello Weston:
You are correct. I was thinking V_fixture and R_fixture (the acutal load
values used when creating the V-T curves) but I typed in the wrong set of
subparameters (should have looked at the spec).
Good catch.
Regards,
Stephen Peters
Intel Corp.
-----Original Message-----
From: Beal, Weston [mailto:weston_beal@mentorg.com]
Sent: Wednesday, February 27, 2002 12:06 PM
To: 'Peters, Stephen'
Subject: RE: Number of Significant Digits
Stephen,
I say here that the end point correlation depends on Vref and Rref, but
those parameters are for the timing reference load. I'm pretty sure you
meant to say V_fixture and R_fixture. I've been trying to explain this
error to quite a few people over that past few months and there is a lot of
confusion out in the world about this relationship. Since you are viewed as
an expert on IBIS I'd appreciate it if you could clarify your statement to
me if I'm wrong or to the list if you typed wrong.
Thanks,
Weston
-----Original Message-----
From: Peters, Stephen [mailto:stephen.peters@intel.com]
Sent: Wednesday, February 27, 2002 11:20 AM
To: 'ibis@eda.org'
Subject: RE: Number of Significant Digits
Hi All:
Keep in mind that the IBIS parser will check the V-T table endpoints
against the I-V table (i.e. check the start/stop value against that
predicted by the I-V table and the Vref/Rref test load). The parser will
report an error if the two points don't agree within 2%. Therefore, there
should be at least enough digits to resolve to a precision level of 2%
Regards,
Stephen Peters
Intel Corp.
-----Original Message-----
From: Dunbar, Tony [mailto:tony_dunbar@mentorg.com]
Sent: Wednesday, February 27, 2002 10:18 AM
To: 'ibis@eda.org'
Subject: RE: Number of Significant Digits
Do you mean before or after the decimal point? In my experience, at least up
to E+16 seems popular for diode clamp currents!
Sorry :)
More seriously, I don't think there is a rule for this, except for the
golden rule of understanding the application of the DUT and generating a
model accordingly. That is, if you're modeling, say, a clock driver that is
intended to be used in a sub-nanosecond tightly controlled timing
environment, something much better than the nearest 1mA or nearest 1nS is
necessary.
I think if s2ibis is used this is something you will setup and 4-sigdigs (or
sometimes min of 3) seems common and probably reasonable, depending on the
units. For example, you could go to 3-sigdigs with units of "A" and/or go to
3-sigdigs with units of "mA" and have 1000X difference in resolution.
Similar thing in the package section for R, L and C and in the waveform
tables for the time units. Of course, you could probably go to more and then
the simulation setup or demands would be such that it was completely
unnecessary.
IMO, I would say that within the region of typical working of the buffer -
say VCC+0.5 volts down to GND-0.5 volts - I would say mA to 4-sigdigs (i.e.
0.1uA resolution) would be good enough with voltage steps of the order of
50mV (to limit interpolation) in the pullup/pulldown tables. In the waveform
tables, nS to 3-sigdigs (i.e. 1pS resolution) is good, with voltages down to
3-, maybe 4-sigdigs.
Interesting to see what others have to say. Again, let the intended
application of the DUT be your determining factor.
Regards,
Tony
-----Original Message-----
From: Lewis, Tony L [mailto:tony.l.lewis@intel.com]
Sent: Wednesday, February 27, 2002 10:57 AM
To: 'ibis@eda.org'
Subject: Number of Significant Digits
Hello Everyone,
I am wondering if there are any rules or common methods for deciding
how many significant digits should be used when creating an IBIS model?
Thank you,
Tony Lewis
Desktop Platform Group
Email: <mailto:tony.l.lewis@intel.com>
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