Re: [IBIS] Comments on BIRD 95.2.

Hello Itzik:

Thank you for your comments.  We agree and will add the time
correlation information to the next revision.

Also, thank you for indicating that the two paragraphs were not
clear.  We will also have to fix that.

To answer briefly your questions:

(1) The [Pin Mapping] keyword is specifically mentioned as
the assumed method to tell the tool which pins are used for
the power and ground connections for each buffer.

(2) The second statement is more of a cautionary note to
describe what the [Composite Current] was NOT designed to
consider.  The various [Submodel]s document the approximate
behavior of some additional elements that could exist
in the I/O buffer architecture.  These elements are
"triggered" by voltage crossings in the actual circuit.
This triggering is not correlated with any [Composite Current]
contributions that might exist from test *_fixture
loads.

To a lessor extent, the same applies to [Driver Schedule]
models which get triggered by time delays.  For some
keyword structural reasons which I do not want to describe
in this response, the additional currents for each submodel
may not accurately be allocated to the major power rail.

So a cautionary note is needed to state conditions where
the [Composite Current] keyword may not apply.

Bob

Itzik Peleg wrote:
> Hello All
> 
>  
> 
> I have one comment and one question regarding BIRD95.2:
> 
>  
> 
> Comment:
> 
> Since V(t) and I(t) need to be time correlated I think that there should 
> be an explicit remark regarding that. (I had mention that in earlier 
> teleconference).
> 
>  
> 
> Question:
> 
>  
> 
> This is a quote from BIRD95.2:
> 
>  
> 
> |              The [Pin Mapping] keyword is used to docuemnt the voltage 
> rails
> 
> |              of several buffers are combined.  This combination 
> includes the
> 
> |              effective impedances describe for each buffer
> 
> |
> 
> |              The [Composite Current] keyword is not designed to accurately
> 
> |              document the effects of controlled switching buffers such as
> 
> |              those defined with [Submodel] or [Driver Schedule] keywords.
> 
>  
> 
> Please elaborate on these 2 remarks. I didn’t understand it.
> 
>  
> 
> --
> 
> Regards
> 
>  
> 
> Itzik Peleg
> 
> Board Technology Group
> 
>  
> 
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-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
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