Re: [IBIS] I-V and V-t curve mismatch

From: Scott McMorrow <scott_at_.....>
Date: Mon Oct 22 2007 - 10:20:03 PDT
To follow up with what Tom and Todd have said, modern process technology 
often will not tolerate voltage swings 1 X Vdd beyond the rails, like 
older technologies did.  In many cases, you will need to adjust your 
extraction method so that it does not exceed the device breakdown 
limits, either in Spice or in measurement-based extraction.


Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax

http://www.teraspeed.com

Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC



Todd Westerhoff wrote:
>
> I agree with Tom.
>
>  
>
> The choice of -2*VDD to 2*VDD is somewhat arbitrary ... it's simply 
> meant to ensure that you have valid V/I data for any voltage that the 
> part will be exposed to.  Thus, you don't need to adjust the voltage 
> ranges based on the MIN and MAX cases.  For most technologies, if you 
> have overshoot that's equal to the supply voltage, you have bigger 
> problems than model accuracy !
>
>  
>
> Todd.
>
>  
>
>
> Todd Westerhoff
> VP, Software Products
> SiSoft
> 6 Clock Tower Place, Suite 250
> Maynard, MA 01754
> (978) 461-0449 x24
> twesterh@sisoft.com <mailto:twesterh@sisoft.com>
> www.sisoft.com <http://www.sisoft.com>
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis@eda.org [mailto:owner-ibis@eda.org] *On Behalf Of 
> *Tom Dagostino
> *Sent:* Monday, October 22, 2007 12:11 PM
> *To:* 'Sudarshan H N'; 'Mirmak, Michael'
> *Cc:* ibis@eda.org; ibis-users@eda.org
> *Subject:* RE: [IBIS] I-V and V-t curve mismatch
>
>  
>
> Model all three corners from --Vdd to 2*Vdd where Vdd is the typical 
> voltage.
>
>  
>
> Tom Dagostino
> Teraspeed(R) Labs
> 13610 SW Harness Lane
> Beaverton, OR 97008
> 503-430-1065
> tom@teraspeed.com
> www.teraspeed.com
>
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> 401-284-1827
>
> *From:* owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] 
> *On Behalf Of *Sudarshan H N
> *Sent:* Monday, October 22, 2007 7:43 AM
> *To:* Mirmak, Michael
> *Cc:* ibis@server.eda.org; ibis-users@server.eda.org
> *Subject:* Re: [IBIS] I-V and V-t curve mismatch
>
>  
>
> Hi Michael & All,
>
> Can you people answer to my question regarding the voltage ranges in 
> MIN and MAX case as explained below. As Arpad mentioned in one of the 
> earlier mails the range for MIN and MAX case is
>
> typ:  -3.3 to 6.6
>
> min:  -3.6 to 6.3
>
> max:  -3.0 to 6.9
>
> How do we select this range for MIN and MAX case. Is there any 
> document which explains the selection criteria for these corners ? If 
> there is no logic , then how can we decide if the supply is 1.8 V 
> supply or 2.5V supply?
>
> Let me know your answers.
>
> Regards
> Sudarshan
>
>  
>
> On 10/19/07, *Sudarshan H N* < hn.sudarshan@gmail.com 
> <mailto:hn.sudarshan@gmail.com>> wrote:
>
> Hi Michael,
>
> Thanks for your detailed reponse. I made a small mistake in putting 
> the voltage ranges as you mentioned. As i was writing a new tool , at 
> this point of time i didnt give much  attention to printing correct 
> voltage range , and i was only worried about the correct extraction of 
> V-t and I-V tables.
>
> I have considered the formula you have mentioned for calculating 
> Vcc-relative Pullup and Powerclamp tables. I changed the voltage range 
> to (3.3, 3.0 and 3.6 which is the actual case) and now i am able to 
> get rid of all these errors.
>
> But still i have one query regarding the values for I-V curves when it 
> is in the Min or MAX corner. I asked about this in my previous mail. 
> Lynne and Arpad gave some answers  but that didnt solve my problem.
>
> The problem with MIN and MAX corner is , what is the voltage range we 
> need to consider for MIN and MAX case . For example if we consider 3.3 
> V supply, the typical range would be -3.3 to 6.6 and this is the 
> voltage range in the IBIS file for all 3 corners. As per the cookbook 
> we need to consider voltage range -Vcc to +2Vcc and hence for the MIN 
> case the range will be -3.0 to +6.0. So in that case what current 
> values we need to put for the voltage range -3.3 to -3.0 and +6.0 to 
> +6.6 whose values will be missing in MIN corner simulations.
>
> I hope i have explained the problem correctly and let me know your 
> answers.
>
> Thanks & Regards
> Sudarshan
>
>  
>
> On 10/18/07, *Mirmak, Michael* <michael.mirmak@intel.com 
> <mailto:michael.mirmak@intel.com>> wrote:
>
> Sudarshan,
>
>  
>
> Thanks for the message.  The major issue appears to be problems in 
> generating the Vcc-relative information, but some general supply 
> issues are cropping up too.  Assuming this is just a regular I/O 
> buffer without internal terminations...
>
>  
>
> 1) I would expect the Pullup I-V tables to pass through the zero V, 
> zero I axis intercept.  Yet they do not, with the max and min data 
> shifted by ~0.3 V above and below 0 V, respectively.  This suggests 
> that the math used to generate the tables may be incorrect.  Remember 
> that, if the data at Vout is collected ground-relative, you can make 
> the power clamp and pullup table data in Vcc-relative by the formula 
> (Vtable_corner = Vcc_corner - Vout_corner), where xxx_corner refers to 
> a value collected for typ, min or max.  For example, if Vcc_min is 4.5 
> V, data collected ground-relative for 0.0 at the output would be 
> entered in the table for the 4.5 V row.
>
>  
>
> The supply voltages and the Pullup I-V axis intercepts (when plotted 
> ground-relative) don't agree, which implies a problem with the supply 
> listed for the [Voltage Range] keyword not matching either the real 
> circuit or the values used to generate the Vcc-relative tables.
>
>  
>
> 2) The voltage for the buffer is 5 V +/- 0.5, but the V-t fixture is 
> 3.3 V +/- 0.3 V.  This complicates the math (it gets very hard for me 
> to calculate the intercepts if they don't match, at least before my 
> first cup of coffee), but it also suggests that the buffer V-t and I-V 
> data sets were collected using different settings or otherwise using 
> different conditions.  I would recommend checking the actual fixtures 
> used for the V-t extraction; matching the fixture voltages to the 
> voltage supply would make checking easier.
>
>  
>
> Calculating the right I-V intercepts vs. V-t levels will be easier 
> once these issues are addressed.
>
>  
>
> - Michael Mirmak
>
>   Intel Corp.
>
>   Chair, EIA IBIS Open Forum
>
>  
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis@server.eda.org <mailto:owner-ibis@server.eda.org> 
> [mailto:owner-ibis@server.eda.org <mailto:owner-ibis@server.eda.org>] 
> *On Behalf Of *Sudarshan H N
> *Sent:* Thursday, October 18, 2007 2:16 AM
> *To:* ibis@server.eda.org <mailto:ibis@server.eda.org>; 
> ibis-users@server.eda.org <mailto:ibis-users@server.eda.org>
> *Subject:* [IBIS] I-V and V-t curve mismatch
>
> Hello Experts,
>
> I am finding problem with one of my IBIS model in I-V and V-t curve 
> mismatch. Please find the attached model for the refernence.
>
> ERROR - Model dummy: The [Rising Waveform]
>       with [R_fixture]=80 Ohms and [V_fixture]=0V
>       has TYP column DC endpoints of  0.01V and  2.66v, but
>       an equivalent load applied to the model's I-V tables yields
>       different voltages (-0.00V and  3.90V),
>       a difference of  0.25% and 31.85%, respectively.
>
> I wrote a new tool to generate IBIS models and i am not able to make 
> out where it is going wrong.
> I actually tried to manually calculate the currents at the points , 
> that it has reported in the above error.
>
> As it is a rising waveform having a R_fixture to ground  the current 
> at 2.66v (steady state) would be 2.66v/50 = 33.25mA.
>
> I looked at the voltage corresponding to 33.25mA in pullup table and i 
> found it is coming around 0.66v. There is a mismatch in the way i am 
> caluculating also. But i observed a different voltage of 0.66v 
> compared to what ibischk4 has reported i.e, 3.9v.
>
> Let me know is the way i am cross checking is correct or not ? If not 
> let me  know the exact procedure.
>
> Also let me know what might have been gone wrong in the curves. From 
> the shape of the curves i am not seeing any problem with the way i 
> have generated.
>
> Please let me know your answers as soon as possible.
>
> Note : Please dont consider any other values apart from the curves 
> like Ramp , C_comp etc as i have dummy values for these place holders.
>
> Thanks & Regards
> Sudarshan
>
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Received on Mon Oct 22 10:33:59 2007

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