Date: Wed Mar 19 2008 - 06:01:34 PDT
Hi, I am qualifying an LVDS buffer, Added to syntax check ( ibischk4) and visual check (hyperlynx) I am doing the following experiment in H-spice For qualifying the transmitter at system level, I am following the following set-up (+ve) Tx_padP <========> txline(Z0=50) <===========> | R = 100 (Resistor termination) (-ve) Tx_padN <========> txline(Z0=50) <===========> | Total round trip delay of Transmission line is 240ps and a square wave of 5 ns pulse width is transmitted With this kind of set-up I am qualifying model I against the extracted spice netlist. What is the best qualifying parameter? Is verifying against Differential mode voltage { ( V( padN) - V( padP ) ) / 2 } sufficient Or need to look at Common mode Voltage { ( V( padN) + V( padP ) ) / 2 } Or Matching both the signal The correlation that I am getting is as shown in figure. Can you make a comment on the quality and the correlation of the model? Thank you, Muniswara Reddy . V Design engineer, PIPD-IO group, Bangalore. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993
