Tom,
Thanks for reading. My intention was not to touch the rest of the spec,
i.e. the new subparameters are totally independent and do not require any
modification to the way we have traditionally extracted IV curves. I guess
I need to add some words explaining that.
Here's what we found at IBM: when the weak pull-up/pull-down is a
resistor, the IO circuit designer can usually refer to the schematic to
find its resistance. When it is a transistor, they need to do a SPICE
simulation. The funny thing is, nobody seems to be really concerned about
what the value actually is. They're thinking that if it's between 10K and
100K, who cares? But a 10K pull-up and 100K pull-down is a LOT different
than a 10K pull-up and a 10K pull-down from the perspective of a receiver
that is expecting to see a valid digital level. It's trivial but extremely
relevant. We've spent many, many painful hours in the lab chasing these
little gremlins.
Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901
----- Forwarded by Gregory R Edlund/Rochester/IBM on 08/19/2010 02:06 PM
-----
From: "Tom Dagostino" <tom@teraspeed.com>
To: Gregory R Edlund/Rochester/IBM@IBMUS, "'ibis@server.eda.org'"
<ibis@eda.org>
Date: 08/19/2010 01:41 PM
Subject: RE: [IBIS] BIRD 113
Greg
Question, does this BIRD just document the presence of the pullup/pulldown
or does it also characterize the pullup/pulldown? Does having the lines:
Weak_pull_up_r 10K NA NA
Weak_pull_up_v 1.5V NA NA
In the model eliminate the need to have current in the powerclamp table
corresponding to this pullup? I suspect not but it is not clear.
I have a concern that model makers will do IV sweeps of the input
structures
and capture the weak pullup/pulldown and then document the same in the
Model
Spec area of the model. This could lead to double counting which could
make
matters worse.
Also, separating the weak pullup/pulldown from the IV characteristics in
the
presence of terminations will be difficult. The weak pullup/pulldown will
lightly offset the termination voltage and termination resistance from
their
true values by less than a percent. From an encrypted SPICE simulation you
won't be able to tell the values and from a measurement point of view we
are
seeing a black box with no way of differentiating the currents.
Thoughts?
Tom Dagostino
Teraspeed Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827
www.teraspeed.com
-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Gregory R
Edlund
Sent: Thursday, August 19, 2010 11:13 AM
To: ibis@server.eda.org
Subject: [IBIS] BIRD 113
Buffer Issue Resolution Document (BIRD)
BIRD ID#: 113
ISSUE TITLE: Weak pull-up and weak pull-down resistance and voltage
REQUESTOR: Greg Edlund, IBM
DATE SUBMITTED: 08/19/10
DATE ACCEPTED BY IBIS OPEN FORUM:
****************************************************************************
****************************************************************************
STATEMENT OF THE ISSUE:
If a chip input has a weak pull-up resistor (say 10K) and another chip
input on the same net has a weak pull-down resistor (say 10K), it is
possible for those inputs to be biased in the receiver threshold region.
This BIRD enables automated checking of this condition. To store this
information, we propose four new subparameters under the [Model Spec]
keyword.
****************************************************************************
STATEMENT OF THE RESOLVED SPECIFICATIONS:
| Keyword: [Model Spec]
| Required: No
| Sub-Params: Vinh, Vinl, Vinh+, Vinh-, Vinl+, Vinl-, S_overshoot_high,
| S_overshoot_low, D_overshoot_high, D_overshoot_low,
| D_overshoot_time, D_overshoot_area_h, D_overshoot_area_l,
| D_overshoot_ampl_h, D_overshoot_ampl_l, Pulse_high,
Pulse_low,
| Pulse_time, Vmeas, Vref, Cref, Rref, Cref_rising,
| C_ref_falling, Rref_rising, Rref_falling, Vref_rising,
| Vref_falling, Vmeas_rising, Vmeas_falling, Rref_diff,
| Cref_diff, Weak_pull_up_r, Weak_pull_up_v,
Weak_pull_down_r,
| Weak_pull_down_v
|
| Description: The [Model Spec] keyword defines four columns under which
| specification subparameters are defined.
|
| The following subparameters are defined:
| Vinh Input voltage threshold high
| Vinl Input voltage threshold low
| Vinh+ Hysteresis threshold high max Vt+
| Vinh- Hysteresis threshold high min Vt+
| Vinl+ Hysteresis threshold low max Vt-
| Vinl- Hysteresis threshold low min Vt-
| S_overshoot_high Static overshoot high voltage
| S_overshoot_low Static overshoot low voltage
| D_overshoot_high Dynamic overshoot high voltage
| D_overshoot_low Dynamic overshoot low voltage
| D_overshoot_time Dynamic overshoot time
| D_overshoot_area_h Dynamic overshoot high area (in V-s)
| D_overshoot_area_l Dynamic overshoot low area (in V-s)
| D_overshoot_ampl_h Dynamic overshoot high max amplitude
| D_overshoot_ampl_l Dynamic overshoot low max amplitude
| Pulse_high Pulse immunity high voltage
| Pulse_low Pulse immunity low voltage
| Pulse_time Pulse immunity time
| Vmeas Measurement voltage for timing
measurements
| Vref Timing specification test load voltage
| Cref Timing specification capacitive load
| Rref Timing specification resistance load
| Cref_rising Timing specification capacitive load for
| rising edges
| Cref_falling Timing specification capacitive load for
| falling edges
| Rref_rising Timing specification resistance load for
| rising edges
| Rref_falling Timing specification resistance load for
| falling edges
| Vref_rising Timing specification test load voltage
for
| rising edges
| Vref_falling Timing specification test load voltage
for
| falling edges
| Vmeas_rising Measurement voltage for rising edge
timing
| measurements
| Vmeas_falling Measurement voltage for falling edge
timing
| measurements
| Rref_diff Timing specification differential
| resistance load
| Cref_diff Timing specification differential
| capacitive load
| Weak_pull_up_r weak pull-up resistance
| Weak_pull_up_v weak pull-up voltage
| Weak_pull_down_r weak pull-down resistance
| Weak_pull_down_v weak pull-down voltage
|
| Usage Rules: [Model Spec] must follow all other subparameters under the
| [Model] keyword.
|
| For each subparameter contained in the first column, the
| remaining three hold its typical, minimum and maximum
values.
| The entries of typical, minimum and maximum must be placed
on
| a single line and must be separated by at least one white
| space. All four columns are required under the [Model
Spec]
| keyword. However, data is required only in the typical
| column. If minimum and/or maximum values are not
available,
| the reserved word "NA" must be used indicating the typical
| value by default.
|
| The minimum and maximum values are used for specifications
| subparameter values that may track the min and max
operation
| conditions of the [Model]. Usually it is related to the
| Voltage Range settings.
|
| Unless noted below, no subparameter requires having present
| any other subparameter.
|
| Weak_pull_up and Weak_pull_down rules:
|
| If an IO circuit uses a simple weak pull-up resistor
| or transistor between the chip IO pad and a power supply,
| Weak_pull_up_r stores the resistance of this resistor or
| transistor and Weak_pull_up_v stores the voltage of the
| power supply to which the resistor or transistor is
| connected.
|
| If an IO circuit uses a simple weak pull-down resistor
| or transistor between the chip IO pad and ground,
| Weak_pull_down_r stores the resistance of this resistor or
| transistor and Weak_pull_down_v stores the voltage of the
| power supply to which the resistor or transistor is
| connected (usually ground).
|
|
| Weak pull-up or pull-down
|
Weak_pull_up_r 10K NA NA
Weak_pull_up_v 1.5V NA NA
Weak_pull_down_r 10K NA NA
Weak_pull_down_v 0 NA NA
****************************************************************************
ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:
IBM consistently sees problems whose root cause is a conflict between
pull-up and pull-down resistors. We have documentation that shows other
companies see the same problems. It can be extremely costly to redesign
hardware to fix these problems even though the fix is usually simple.
Checking programs exist, but the input data to feed these programs does
not exist in electronic format. Engineers currently have to dig through
many, many pages of component datasheets to find this information, which
may not even be documented at all. To run the checking programs, engineers
must hand code the pull-up and pull-down values into the input files.
This is a labor-intensive and error-prone process.
The industry needs a means for storing this information to enable automated
checking and insure product quality. Since the information pertains
directly to IO circuits and is not readily available in a machine-readable
format, IBIS is the natural source.
It is not possible to extract weak pull-up or pull-down resistances from
[GND Clamp] and [POWER Clamp] curves since they may contain current from
three possible sources:
1. ESD protection devices
2. termination
3. weak pull-up or pull-down
****************************************************************************
ANY OTHER BACKGROUND INFORMATION:
****************************************************************************
Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901
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