[IBIS] BIRD 113.2

For discussion at October 22 call.

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901

BIRD ID#: 113.2
ISSUE TITLE: Weak tie-up or tie-down resistance and voltage
REQUESTOR: Greg Edlund, IBM
DATE SUBMITTED: August 19, 2010
DATE REVISED: September 10, 2010, October 20, 2010
DATE ACCEPTED BY IBIS OPEN FORUM:

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STATEMENT OF THE ISSUE:

If a chip input has a weak tie-up resistor (say 10K) and another chip
input on the same net has a weak tie-down resistor (say 10K), the network
of resistors may bias the receiver(s) in the threshold region. This BIRD
enables automated checking of this condition. To store this information,
we propose two new subparameters under the [Model Spec] keyword:
Weak_R and Weak_V.

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STATEMENT OF THE RESOLVED SPECIFICATIONS:

(BIRD113.2 changes marked by |** lines)

| Keyword: [Model Spec]
| Required: No
| Sub-Params: Vinh, Vinl, Vinh+, Vinh-, Vinl+, Vinl-, S_overshoot_high,
| S_overshoot_low, D_overshoot_high, D_overshoot_low,
| D_overshoot_time, D_overshoot_area_h, D_overshoot_area_l,
| D_overshoot_ampl_h, D_overshoot_ampl_l, Pulse_high,
Pulse_low,
| Pulse_time, Vmeas, Vref, Cref, Rref, Cref_rising,
| C_ref_falling, Rref_rising, Rref_falling, Vref_rising,
| Vref_falling, Vmeas_rising, Vmeas_falling, Rref_diff,
|* Cref_diff, Weak_R, Weak_V, Weak_I
|
| Description: The [Model Spec] keyword defines four columns under which
| specification subparameters are defined.
|
| The following subparameters are defined:
| Vinh Input voltage threshold high
| Vinl Input voltage threshold low
| Vinh+ Hysteresis threshold high max Vt+
| Vinh- Hysteresis threshold high min Vt+
| Vinl+ Hysteresis threshold low max Vt-
| Vinl- Hysteresis threshold low min Vt-
| S_overshoot_high Static overshoot high voltage
| S_overshoot_low Static overshoot low voltage
| D_overshoot_high Dynamic overshoot high voltage
| D_overshoot_low Dynamic overshoot low voltage
| D_overshoot_time Dynamic overshoot time
| D_overshoot_area_h Dynamic overshoot high area (in V-s)
| D_overshoot_area_l Dynamic overshoot low area (in V-s)
| D_overshoot_ampl_h Dynamic overshoot high max amplitude
| D_overshoot_ampl_l Dynamic overshoot low max amplitude
| Pulse_high Pulse immunity high voltage
| Pulse_low Pulse immunity low voltage
| Pulse_time Pulse immunity time
| Vmeas Measurement voltage for timing
measurements
| Vref Timing specification test load voltage
| Cref Timing specification capacitive load
| Rref Timing specification resistance load
| Cref_rising Timing specification capacitive load for
| rising edges
| Cref_falling Timing specification capacitive load for
| falling edges
| Rref_rising Timing specification resistance load for
| rising edges
| Rref_falling Timing specification resistance load for
| falling edges
| Vref_rising Timing specification test load voltage
for
| rising edges
| Vref_falling Timing specification test load voltage
for
| falling edges
| Vmeas_rising Measurement voltage for rising edge
timing
| measurements
| Vmeas_falling Measurement voltage for falling edge
timing
| measurements
| Rref_diff Timing specification differential
| resistance load
| Cref_diff Timing specification differential
| capacitive load
|* Weak_R Weak tie-up or tie-down resistance
|** Weak_I Weak tie-up or tie-down current
|* Weak_V Weak tie-up or tie-down voltage
|
| Usage Rules: [Model Spec] must follow all other subparameters under the
| [Model] keyword.
|
| For each subparameter contained in the first column, the
| remaining three hold its typical, minimum and maximum
values.
| The entries of typical, minimum and maximum must be placed
on
| a single line and must be separated by at least one white
| space. All four columns are required under the [Model
Spec]
| keyword. However, data is required only in the typical
| column. If minimum and/or maximum values are not
available,
| the reserved word "NA" must be used indicating the typical
| value by default.
|
| The minimum and maximum values are used for specifications
| subparameter values that may track the min and max
operation
| conditions of the [Model]. Usually it is related to the
| Voltage Range settings.
|
| Unless noted below, no subparameter requires having present
| any other subparameter.
|
|** Weak_R, Weak_I, and Weak_Vrules:
|*
|* If an IO circuit uses a simple weak tie-up or tie-down
|* device (resistor or transistor) between the chip IO pad
|* and a power supply, Weak_R stores the resistance of this
|* device and Weak_V stores the voltage of the power supply
|** to which the device is connected. A Weak_I stores the
|** the approximate current into the device and Weak_V stores
|** the voltage of the power supply. They apply to both
|* static and configurable tie-up and tie-down devices.
|*
|** The Weak_R, Weak_I, and Weak_V subparameters are optional
and
|** and separate from the current-voltage table keywords, e.g.,
|* [Pullup], [GND Clamp], etc. They do not affect how the
|* current-voltage tables are extracted.
|*
|** (Weak_R and Weak_V) or (Weak_I and Weak_V) must always be
used
|** as a pair. Weak_R and Weak_I must not be used together
|*
|** The current flow convention for Weak_I is similar to that
of
{** [GND Clamp] and {POWER Clamp] tables. A positive sign
|** documents a weak tie-down current. A negative sign
documents
|** a weak tie-up current.
|*
|* Weak tie-up examples:
|*
Weak_R 10k NA NA
Weak_V 1.5V NA NA
|*
Weak_I -10u NA NA | tie-up current uses
Weak_V 1.5V NA NA | negative sign
|*

****************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:

IBM consistently sees problems whose root cause is a conflict between weak
tie-up and tie-down resistors. We have documentation that shows other
companies see the same problems. It can be extremely costly to redesign
hardware to fix these problems even though the fix is usually simple.

Checking programs exist, but the input data to feed these programs does
not exist in electronic format. Engineers currently have to dig through
many, many pages of component datasheets to find this information, which
may not even be documented at all. To run the checking programs, engineers
must hand code the tie-up and tie-down values into the input files, which
is a labor-intensive and error-prone process.

The industry needs a means for storing this information to enable automated
checking and insure product quality. Since the information pertains
directly to IO circuits and is not readily available in a machine-readable
format, IBIS is the natural source.

It is not possible to extract weak tie-up or tie-down resistances from
[GND Clamp] and [POWER Clamp] curves under all conditions since they may
contain current from three possible sources:

1. ESD protection devices
2. low-impedance termination for signal integrity purposes
3. weak tie-up or tie-down devices

BIRD113.2
BIRD113.1 reduced the proposal to a [Model Spec] subparameters Weak_V
and Weak_R. The sign of Weak_V is sufficient to document a tie-up or
tie-down resistance.

If the user wants to do an actual estimation of the strength, a Weak_R
might give misleading results for MOSFET type resistors that appear over
most of its range as a current source. With the information provided,
all the tie-downs and tie-up circuits on a net can be combined into an
overall Thevenin equivalent resistor-voltage circuit and total current
to produce an estimated voltage on the net. Just approximating current
sources with Weak_R, Weak_V circuits can give misleading voltage
estimations.

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ANY OTHER BACKGROUND INFORMATION:

BIRD113 was submitted August 19, 2010 and discussed at the August 20, 2010
IBIS Open Forum teleconference. BIRD113.1 was developed and discussed
through private e-mail exchanges and formally submitted after the IBIS
Open Forum teleconference on September 10, 2010.
****************************************************************************

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