To All:
The IBIS Open Forum is holding an Asian IBIS Summit Meeting in
Shanghai, China, a major technology center. The meeting will take
place on Tuesday, November 15, 2011.
Several companies listed below are co-sponsoring this large event
to be held at the Parkyard Hotel, Shanghai. Like in previous
years, we are planning for a large number of attendees including
several IBIS experts from the USA.
As noted in the AGENDA section below, we have a full program. The
Agenda will be issued later.
For travel consideration, two other Asian IBIS Summits follow this
event:
Yokohama, Japan, Friday, November 18, Pacifico Yokohama
Taipei, Taiwan, Monday, November 21, Sherwood Hotel
Bob Ross
Teraspeed Consulting Group
Lance Wang
IO Methodology Inc.
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ASIAN IBIS SUMMIT (SHANGHAI)
FIFTH CALL FOR PARTICIPATION
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http://www.eda.org/pub/ibis/summits/nov11a/announcement_chinese.pdf
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A S I A N I B I S S U M M I T ( S H A N G H A I )
Time/Date: Tuesday, November 15, 2011, 8:00 AM to 5:30 PM
Meeting starts at 8:45 AM
Location: Parkyard Hotel Shanghai
699 Bibo Road
Zhangjiang Hi-Tech Park
Shanghai 201203
P.R. China
http://www.parkyard.com/en/hotel_index.aspx?currenthotelid=6
Content: Presentations and Discussions
Purpose: Solicit and exchange IBIS and interconnect model related
information and ideas.
Primary Sponsor:
Huawei Technologies
Co-sponsors (in alphabetical order):
Agilent Technologies, Ansoft, Cadence Design Systems,
Intel Corporation, IO Methodology, Sigrity, Synopsys,
and ZTE Corporation.
Cost: FREE, including refreshments and buffet lunch
Vendors: Some vendors will have information tables outside
the meeting room
Contact us for details regarding sponsorship.
BACKGROUND
We have held six successful meetings in Shenzhen, Shanghai and Beijing.
This year we are meeting again in Shanghai where many Chinese and
foreign high technology companies operate. These events are archived
along with all our other Summits:
http://www.eda.org/pub/ibis/summits/
Our objective is to reach out internationally to communicate with
the local experts and to learn of regional concerns.
CONFERENCE LANGUAGE
The conference language is English, but we will plan for technical
translations in English and Chinese. So presenters can optionally
deliver in Chinese as long as an English version of the material is
available.
IBIS SUMMIT
This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations will be archived in an electronic format on our
Summits site, and minutes of the meeting will be issued. However,
no formal decisions requiring votes will be planned.
CALL FOR PARTICIPANTS
People involved in IBIS and interconnect model development, EDA
tool development, and digital circuit design are invited to
participate in the Summit meeting. If you plan to participate,
please register using the information below (in English):
Name:
E-mail address:
Company:
Top-level Web Link:
Country:
Telephone:
Comments:
(Such as assistance for the travel requirements at the end)
Send to BOTH:
Bob Ross, Teraspeed Consulting Group bob@teraspeed.com
Lance Wang, IO Methodology Inc. lwang@iometh.com
SIGNUP DEADLINE: November 10, 2011
AGENDA
8:15 - 9:00 Vendor table setup and tables
8:30 - 9:00 Sign in
9:00 - 12:00 Presentations
12:00 - 13:30 Free buffet lunch, vendor tables
13:30 - 17:30 Presentations
Planned Presentations:
IBIS Status and Future Directions
(Intel Corporation)
IBIS Model as De-Facto Standard
(Wadow Co. and Xpeedic)
IBIS VT Waveform and Over Clocking
(Synopsys)
IBIS Parsers
(Teraspeed Consulting Group)
DDR3 System Timing Budget Analysis by SI&PI Co-Simulation
(ZTE Corporation)
Modeling the On-die De-cap of IBIS 5.0 PDN-aware Buffers
(IO Methodology and Micron Technology)
Power-aware I/O Modeling for High-speed Parallel Bus Simulation
(Sigrity)
The Application of of IBIS-AMI Model Cascaded Simulation
for 10 Gigabit Repeater Serial Link Analysis
(Huawei Technologies, Sigrity, and Texas Instruments)
AMI Applications in High-speed Serial Channel Analysis and
Measurement Correlation
(ZTE Corporation)
Psuedo Transient Eye Analysis by Convolution Method
(Ansys)
Introduction of FEC IL Gain Estimation Method in High Speed
Link
(Huawei Technologies)
Supporting External Circuit as Spice or S-parameters in
Conjunction with I-V/V-T Tables
(IBM Microsystems and Cadence Design Systems)
Board-Only Power Delivery Prediction for Voltage Regulator
and Mother Board Designs
(Intel corporation)
LIST OF NEARBY HOTELS AND TRAVEL RULES
Hotels in all price ranges can be found through internet searches.
Comply with your travel rules, such as indicated in the link
below to China and Shanghai. Work with your travel agent. Notify
us as a sign-up comment if you need assistance. Visas, if needed,
should fall in the visit/business category:
http://travel.state.gov/travel/cis_pa_tw/cis/cis_1089.html
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