[IBIS] Asian IBIS Summit (Hsinchu) - Fifth Announcement

From: Bob Ross <bob@teraspeed.com>
Date: Tue Oct 09 2012 - 17:12:18 PDT
To All:

 

The IBIS Open Forum is holding its third Asian IBIS Summit Meeting in

Taiwan. We are meeting for the first time in Hsinchu on Tuesday,

November 13, 2012.  Some tentative topics are listed below in the

AGENDA section

 

Several companies listed below are co-sponsoring this major event

to be held at the Ambassador Hotel, Hsinchu.

 

Other Asian IBIS Summit meetings are scheduled for:

 

  Shanghai, P.R. China, Friday November 9, Parkyard Hotel

  Yokohama, Japan, Friday, November 16, Pacifico Yokohama

 

Lance Wang

IO Methodology

 

Bob Ross

Teraspeed Consulting Group

 

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                         ASIAN IBIS SUMMIT  (HSINCHU)

                         FIFTH CALL FOR PARTICIPATION

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            A S I A N   I B I S   S U M M I T   ( H S I N C H U )

 

Time/Date:  Tuesday, November 13, 2012, 8:00 AM to 4:30 PM

            Meeting starts at 8:30 AM

 

Location:   Ambassador Hotel Hsinchu

            No.188 Section 2, Chung Hwa Road

            Hsinchu 300, Taiwan

 

   http://www.ambassadorhotel.com.tw/HC/ambassador_hsinchu.htm?LC=EN

 

Room:       Tentatively Ballroom D

 

Content:    Presentations and Discussions

 

Purpose:    Solicit and exchange IBIS and interconnect model related

            information and ideas.

 

Primary Sponsor:

            ANSYS

 

Co-sponsors (in alphabetical order):

            Agilent Technologies

            Avant Technology (IO Methodology)

            Cadence Design Systems

            Intel Corporation

            Synopsys

 

Cost:       FREE, including refreshments and buffet lunch

 

Vendors:    Some vendors will have information tables outside the

            meeting room

 

            Contact us for details regarding sponsorship.

 

BACKGROUND

 

   We have held many successful Summit meetings across Asia in previous 

   years.  This will be our third meeting in Taiwan where many national

   and international high technology companies have operations.

 

   Our objective is to reach out internationally to communicate with

   the local experts and to learn of regional concerns.

 

CONFERENCE LANGUAGE

 

   The conference language is English, but we will plan for technical

   translations in English and Chinese.  So presenters can optionally

   deliver in Chinese as long as an English version of the material is

   available.

 

IBIS SUMMIT

 

   This meeting will be conducted as a formal IBIS Summit Meeting.

   Presentations will be archived in an electronic format on our

   Summits site, and minutes of the meeting will be issued.  However,

   no formal decisions requiring votes will be planned.

 

CALL FOR PARTICIPANTS

 

   People involved in IBIS and interconnect model development, EDA

   tool development, and digital circuit design are invited to

   participate in the Summit meeting.  If you plan to participate,

   please register using the information below (in English):

 

     Name:

     E-mail address:

 

     Company:

     Top-level Web Link:

 

     Country:

     Telephone:

 

   Send to BOTH:

 

     Lance Wang, IO Methodology             lwang@iometh.com

     Bob Ross, Teraspeed Consulting Group   bob@teraspeed.com

 

   SIGNUP DEADLINE: November 7, 2012

 

 

AGENDA

 

   8:00 -   8:30  Vendor table setup and tables

   8:00 -   8:30  Sign in

   8:30 -  12:00  Presentations

   12:00 - 13:30  Free buffet lunch, vendor tables

   13:30 - 16:30  Presentations

 

   The Agenda is still being developed as topics and presentations are

   submitted. Below is a tentative list of planned presentations.

 

   Intel Corporation

   IBIS 5.1: An Overview

 

   Cadence Design Systems and University of Illinois

   Using Latency Insertion Method to Handle IBIS Models

 

   ANSYS

   The Evolution of DDR Memory and Overcoming Challenges of 

   DDR3/4 Design 

 

   Cadence Design Systems

   Designing DDR3 System Using Static Timing Analysis in Conjunction

   with IBIS Simulations

 

   Agilent Technologies

   Efficient End-to-end Simulations of 25G Optical Links

 

   ANSYS (Tentative topic)

   High-Speed Serial Topic focused on AMI topic

 

   Cadence Design Systems

   Chip PDN Model for Power Aware Signal Integrity Analysis

 

   Teraspeed Consulting Group (tentative topic)

   IBIS Parser Update topic

 

   IO Methodology

   IBIS Validation Method Review

 

 

LIST OF NEARBY HOTELS AND TRAVEL

 

   Hotels in all price ranges can be found through internet searches.

   The conference hotel link is

 

   http://www.ambassadorhotel.com.tw/HC/ambassador_hsinchu.htm?LC=EN

 

   If you would like to stay at the conference hotel, contact

   Lance Wang (lwang@iometh.com) for the discounted room rate.

 

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Received on Tue Oct 9 17:13:01 2012

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