[IBIS] Asian IBIS Summit (Yokohama) - Fourth Announcement

From: Bob Ross <bob@teraspeedlabs.com>
Date: Tue Nov 04 2014 - 17:28:40 PST
To All:

 

The IBIS Open Forum will hold its ninth Asian IBIS Summit Meeting

on Thursday, November 20, 2014 in Yokohama, Japan.  We have a full

program and are starting the meeting on Thursday afternoon.

 

Note, the sign in time has changed to 12:30, and the meeting will

end at 16:30.  The tentative presentations and sponsors are given

below

 

An Embedded Technology Conference and Exhibition on November

19-21, 2014 is co-located with the IBIS Summit.

 

Note that we are also holding two other Asian IBIS Summits:

 

  Shanghai, China   Friday, November 14, 2014

  Taipei, Taiwan    Monday, November 17, 2014

 

Bob Ross

Teraspeed Labs

 

Yukio Masuko

Cadence Design Systems

 

----------------------------------------------------------------------

                         ASIAN IBIS SUMMIT (YOKOHAMA)

                        FOURTH CALL FOR PARTICIPATION

----------------------------------------------------------------------

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

 

          A S I A N   I B I S   S U M M I T   ( Y O K O H A M A )

 

Time/Date:  Thursday, November 20, 2014, 12:30 to 16:30

            Meeting starts at 13:00

 

Location:   Pacifico Yokohama Conference Center

            1-1-1, Minato Mirai, Nishi-ku

            Yokohama, JAPAN

 

URL:        http://www.pacifico.co.jp/english/index.html

 

ROOM        503

 

Content:    Presentations and Discussions

 

Purpose:    Solicit and Exchange IBIS Model Related Information

            and Ideas.

 

Organizational Sponsors:

            Japan Electronics and Information Technology Industries

               Association (JEITA)

            IBIS Open Forum

 

Co-sponsors (in alphabetical order):

            ANSYS

            Cadence Design Systems

            Cybernet Systems

            Mentor Graphics Corp.

            MoDeCH

            Zuken

 

Cost:       FREE, including refreshments

 

Exhibition: Embedded Technology Conference and Exhibition

Date:       November 19-21,2014

URL:        http://10times.com/embedded-technology-exhibition

 

 

BACKGROUND

   This year we holding the ninth Asian IBIS Summit meeting in Japan.

   Several high-technology Japanese companies operate in the Tokyo

   and Yokohama area and are affiliated with JEITA and IBIS.

 

   Our objective is to reach out internationally to communicate with

   the local experts and to learn of regional concerns.

 

CONFERENCE LANGUAGE

 

   The conference language is English, but we will plan for technical

   translations in English and in Japanese. Presenters may deliver in

   Japanese, but the presentation slides should be in English.

 

IBIS SUMMIT

 

   This meeting will be conducted as a formal IBIS Summit Meeting.

   Presentations will be archived in an electronic format on our

   Summit site, and meeting minutes will be issued. However no formal 

   decisions requiring votes will be planned.

 

CALL FOR PARTICIPANTS

 

   People involved in IBIS model development, EDA tool development and

   digital circuit design are invited to participate in the Summit

   meeting. If you plan to participate, please register with the

   information below:

 

     Name:

     E-mail address:

 

     Company:

     Top-level Web Link:

 

     Country:

 

   Send to BOTH:

 

     Bob ROSS, Teraspeed Labs                bob@teraspeedlabs.com

     Yukio MASUKO, Cadence Design Systems    masuko@cadence.com

 

   SIGNUP DEADLINE: November 17, 2014

 

     Advance registration is requested for refreshments planning.

 

AGENDA (Tentative)

 

   12:30    Sign in Asian IBIS Summit (Yokohama)

   13:00    Presentations

   14:45    Refreshments

   15:00    Presentations

   16:30    End of Meeting

 

TENTATIVE PRESENTATIONS

 

   Intel Corporation

     Activities and Direction of IBIS

 

   Fujitsu Advanced Technology

     Introduction of IBIS Promotion Working Group

 

     Inconsistency of EBD (Electrical Board Description) in DDR3

       DIMM

 

   KEI Systems

     IBIS Package Model (Past, Present, What's Next)

 

   IO Methodology

     Differential Buffer Using IBIS Models for PDN Simulations

 

   Cadence Design Systems

     True Differential IBIS Model for SerDes Analog Buffer

 

   Ericsson

     IBIS AMI Validation

 

   Wadow

     IBIS Model Engineering Application Possibility

 

   Toshiba Semiconductor & Storage

     Introduction of P2401 LSI-Package-Board Standard Format

 

LIST OF NEARBY HOTELS AND TRAVEL RULES

 

   Hotels at and near the Pacifico Yokohama can be found through

   internet searches.

 

-----------------------------------------------------------------

 

 

--

 

Bob Ross

Teraspeed Labs

http://www.teraspeedlabs.com

bob@teraspeedlabs.com

Direct: 503-246-8048

Office: 971-279-5325

 

 


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