Subject: Re: Execution of s2ibis2
From: Abdulrahman A. Rafiq (arafiq@cisco.com)
Date: Sat Nov 24 2001 - 12:36:33 PST
Ramesh Karmungi wrote:
> Hello Abbey,
>
> Thanks for quick reply. Outfile is not generated. It has generated 10
> (.spi) files, whereas in putout.spi netlist and model parameters are
> given and no error message. However, in other .spi files only header
> without netlist.
> I am herewith attaching tristate.s2i and putout.spi files.
> when i have run the tristate.s2i as downloaded (it has spice type:
> Spectra), it runs s2ibis2 without error and creates .ibs but without
> any I/V or V/T data.
> I would be thankful if you could give me suggestions.
>
> Thanks and Regards
> Ramesh
>
> Abdulrahman A Rafiq wrote:
>
>> Ramesh,
>>
>> Is there an output file generated ? Can you open it in your basic
>> text editor and see what error message its flaging ?
>> Also see if you can open the .spi file and see if there are any
>> messages in there ?
>>
>> Abbey A. Rafiq
>>
>>
>>
>>
>> At 12:35 PM 11/23/2001 +0530, Ramesh Karmungi wrote:
>>
>> > Hello,
>> >
>> > I am new user of IBIS tools. I have downloaded Spitran to develop
>> > ibis models. Spitran gives me .s2i file. This was used as input
>> > file to run s2ibis2.exe. However, am unable to run s2ibis2.
>> > Following lines will appear on screen and stops execution of
>> > s2ibis2..
>> >
>> > s2ibis2: Analyzing component MCM Driver .
>> > s2ibis2: Starting HSpice job with input putout.spi.
>> > failure!!!!!
>> >
>> > I have noticed it creates a .spi file in the process.
>> >
>> > I work on PC with windows 2000 or windows NT system. I have Avanti
>> > HSPICE 99.4.
>> > Could anyone help me out to sort out the problem.
>> >
>> > Thanks and Regards with anticipation
>> >
>> > Ramesh K
>>
> ----------------------------------------------------------------
> * Typ pullup curve for model tristate_driver
> *
> * Spice deck created by s2ibis v 1.1
> * North Carolina State University
> *
> minva vdd enable nena vdd pfet w=3.6e-06 l=6e-07 ad=2.1015e-11 as=5.4e-12
> +pd=2.355e-05 ps=6.6e-06
> minvb gnd enable nena gnd nfet w=1.8e-06 l=6e-07 ad=1.107e-11 as=2.7e-12
> +pd=1.35e-05 ps=4.8e-06
>
> mx33 n5 enable vdd vdd pfet w=3.84e-05 l=6e-07 ad=5.76e-11 as=5.76e-11
> +pd=4.14e-05 ps=4.14e-05
> mx24 n5 in n2 vdd pfet w=3.6e-06 l=6e-07 ad=2.1015e-11 as=5.4e-12 pd=2.355e-05
> +ps=6.6e-06
> mx25 n3 n2 n5 vdd pfet w=1.41e-05 l=6e-07 ad=2.115e-11 as=2.1015e-11
> +pd=1.71e-05 ps=2.355e-05
> mx27 n5 n3 n4 vdd pfet w=3.21e-05 l=6e-07 ad=9.3915e-11 as=2.889e-11
> +pd=1.0125e-05 ps=1.8e-06
> mx26 n4 n3 n5 vdd pfet w=3.21e-05 l=6e-07 ad=2.889e-11 as=4.815e-11 pd=1.8e-06
> +ps=3.51e-05
> mx32 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=1.0116e-10 as=7.587e-11
> +pd=4.695e-05 ps=3.6e-06
> mx31 n5 n4 out vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx30 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx29 n5 n4 out vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx28 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=9.3915e-11
> +pd=3.6e-06 ps=1.0125e-05
> mx14 n7 in n2 gnd nfet w=1.8e-06 l=6e-07 ad=1.107e-11 as=2.7e-12 pd=1.35e-05
> +ps=4.8e-06
> mx23 gnd nena n7 gnd nfet w=3.6e-05 l=6e-07 ad=5.4e-11 as=5.4e-11 pd=3.9e-05
> +ps=3.9e-05
> mx15 n3 n2 n7 gnd nfet w=7.2e-06 l=6e-07 ad=1.08e-11 as=1.107e-11 pd=1.02e-05
> +ps=1.35e-05
> mx17 n7 n3 n4 gnd nfet w=1.62e-05 l=6e-07 ad=4.725e-11 as=1.458e-11
> +pd=7.575e-06 ps=1.8e-06
> mx16 n4 n3 n7 gnd nfet w=1.62e-05 l=6e-07 ad=1.458e-11 as=2.43e-11 pd=1.8e-06
> +ps=1.92e-05
> mx22 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=5.076e-11 as=3.807e-11
> +pd=2.595e-05 ps=3.6e-06
> mx21 n7 n4 out gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx20 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx19 n7 n4 out gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx18 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=4.725e-11
> +pd=3.6e-06 ps=7.575e-06
> * N56S SPICE BSIM1 (Berkeley Level 4; HSPICE Level 13) PARAMETERS
> * Modified to use regular SPICE (not HSPICE) names for Spectre
> *
> *NMOS PARAMETERS
> *
> .MODEL nfet NMOS level=4
> +vfb0=-6.67767E-01
> +lvfb=-9.88313E-03
> +wvfb=-3.29367E-02
> +phi0=8.60647E-01
> +lphi=0.00000E+00
> +wphi=0.00000E+00
> +k1=8.17935E-01
> +lk1=-4.65708E-02
> +wk1=4.75791E-02
> +k2=4.25774E-02
> +lk2=3.52629E-02
> +wk2=-2.77046E-03
> +eta0=-6.14649E-05
> +leta=1.89078E-02
> +weta=-1.18479E-02
> +muz=5.83829E+02
> +dl0=1.40291E-001
> +dw0=5.07562E-001
> +u00=3.29586E-01
> +lu0=9.77520E-02
> +wu0=-9.32319E-02
> +u1=1.99382E-02
> +lu1=3.61973E-02
> +wu1=-2.86830E-03
> +x2m=1.29121E+01
> +lx2m=-8.28086E+00
> +wx2m=6.90864E+00
> +x2e=7.54028E-04
> +lx2e=-3.43366E-03
> +wx2e=5.18763E-04
> +x3e=2.37991E-04
> +lx3e=-1.61033E-03
> +wx3e=-5.39861E-03
> +x2u0=-6.35761E-03
> +lx2u0=-3.86200E-03
> +wx2u0=5.33022E-03
> +x2u1=-5.68012E-04
> +lx2u1=1.22523E-03
> +wx2u1=2.85097E-04
> +mus=6.84165E+02
> +lms=-2.54285E+01
> +wms=9.21339E-01
> +x2ms=4.89160E+00
> +lx2ms=-1.90933E+00
> +wx2ms=7.94142E+00
> +x3ms=4.83048E+00
> +lx3ms=4.02423E+00
> +wx3ms=-5.33716E+00
> +x3u1=7.20765E-03
> +lx3u1=-1.37194E-04
> +wx3u1=-3.70674E-03
> +tox=1.00000E-008
> +tempm=2.70000E+01
> +vddm=5.00000E+00
> +cgdom=3.63E-010
> +cgsom=3.63E-010
> +cgbom=4.52505E-010
> +xpart=1.00000E+000
> +n0=1.00000E+000
> +ln0=0.00000E+000
> +wn0=0.00000E+000
> +nb0=0.00000E+000
> +lnb=0.00000E+000
> +wnb=0.00000E+000
> +nd0=0.00000E+000
> +lnd=0.00000E+000
> +wnd=0.00000E+000
> *
> *N+ diffusion::
> *
> +rsh=2.4
> +cj=7.732100e-04
> +cjw=2.900000e-10
> +ijs=1e-08
> +pj=0.8
> +pjw=0.8
> +mj=1.10106
> +mjw=0.26
> +wdf=0
> *
> *PMOS PARAMETERS
> *
> .MODEL pfet PMOS level=4
> +vfb0=-6.59693E-02
> +lvfb=-1.78327E-02
> +wvfb=-2.45473E-03
> +phi0=7.68179E-01
> +lphi=0.00000E+00
> +wphi=0.00000E+00
> +k1=2.85648E-01
> +lk1=-1.64579E-02
> +wk1=3.08917E-02
> +k2=-6.62532E-02
> +lk2=2.49518E-02
> +wk2=4.62778E-04
> +eta0=-7.90844E-03
> +leta=1.92294E-02
> +weta=-2.34646E-03
> +muz=1.41704E+02
> +dl0=2.14000E-001
> +dw0=5.34406E-001
> +u00=1.95407E-01
> +lu0=6.22059E-02
> +wu0=-5.94668E-02
> +u1=8.56390E-03
> +lu1=1.39477E-02
> +wu1=7.65802E-04
> +x2m=6.79470E+00
> +lx2m=-1.43654E+00
> +wx2m=6.56475E-01
> +x2e=1.08483E-04
> +lx2e=-1.24539E-03
> +wx2e=9.77240E-05
> +x3e=4.33468E-04
> +lx3e=1.42453E-04
> +wx3e=-1.71650E-03
> +x2u0=8.73535E-03
> +lx2u0=-1.31646E-03
> +wx2u0=4.78072E-04
> +x2u1=3.06834E-04
> +lx2u1=4.41194E-04
> +wx2u1=3.49198E-04
> +mus=1.47746E+02
> +lms=1.78644E+01
> +wms=1.24739E-01
> +x2ms=6.09155E+00
> +lx2ms=-1.61404E-01
> +wx2ms=1.24507E+00
> +x3ms=-3.18656E-01
> +lx3ms=2.79732E+00
> +wx3ms=1.71058E+00
> +x3u1=-1.22826E-03
> +lx3u1=1.06181E-04
> +wx3u1=1.07711E-03
> +tox=1.00000E-008
> +tempm=2.70000E+01
> +vddm=5.00000E+00
> +cgdom=5.540E-010
> +cgsom=5.54E-010
> +cgbom=4.67045E-010
> +xpart=1.00000E+000
> +n0=1.00000E+000
> +ln0=0.00000E+000
> +wn0=0.00000E+000
> +nb0=0.00000E+000
> +lnb=0.00000E+000
> +wnb=0.00000E+000
> +nd0=0.00000E+000
> +lnd=0.00000E+000
> +wnd=0.00000E+000
> *
> *P+ diffusion::
> *
> +rsh=2.1
> +cj=9.319100e-04
> +cjw=1.563700e-10
> +ijs=1e-08
> +pj=0.85
> +pjw=0.85
> +mj=0.487073
> +mjw=0.47848
> +wdf=0
>
> * simple diode model
> .model clamp d vj=0.7 rs=100
> VOUTS2I out 0 DC 0
> VCCS2I vdd 0 DC 3.3
> VGNDS2I gnd 0 DC 0
> VENAS2I enable 0 DC 0
> VINS2I in 0 DC 3.3
> .TEMP 27
> .OPTIONS INGOLD=2
> .DC VOUTS2I -3.3 6.6 0.1
> .PRINT DC I(VOUTS2I)
> .END
>
> ----------------------------------------------------------------
> *
> * simple inverter
> *
> minva vdd enable nena vdd pfet w=3.6e-06 l=6e-07 ad=2.1015e-11 as=5.4e-12
> +pd=2.355e-05 ps=6.6e-06
> minvb gnd enable nena gnd nfet w=1.8e-06 l=6e-07 ad=1.107e-11 as=2.7e-12
> +pd=1.35e-05 ps=4.8e-06
>
> *
> * tristate buffer model
> *
> mx33 n5 enable vdd vdd pfet w=3.84e-05 l=6e-07 ad=5.76e-11 as=5.76e-11
> +pd=4.14e-05 ps=4.14e-05
> mx24 n5 in n2 vdd pfet w=3.6e-06 l=6e-07 ad=2.1015e-11 as=5.4e-12 pd=2.355e-05
> +ps=6.6e-06
> mx25 n3 n2 n5 vdd pfet w=1.41e-05 l=6e-07 ad=2.115e-11 as=2.1015e-11
> +pd=1.71e-05 ps=2.355e-05
> mx27 n5 n3 n4 vdd pfet w=3.21e-05 l=6e-07 ad=9.3915e-11 as=2.889e-11
> +pd=1.0125e-05 ps=1.8e-06
> mx26 n4 n3 n5 vdd pfet w=3.21e-05 l=6e-07 ad=2.889e-11 as=4.815e-11 pd=1.8e-06
> +ps=3.51e-05
> mx32 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=1.0116e-10 as=7.587e-11
> +pd=4.695e-05 ps=3.6e-06
> mx31 n5 n4 out vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx30 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx29 n5 n4 out vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=7.587e-11
> +pd=3.6e-06 ps=3.6e-06
> mx28 out n4 n5 vdd pfet w=4.215e-05 l=9e-07 ad=7.587e-11 as=9.3915e-11
> +pd=3.6e-06 ps=1.0125e-05
> mx14 n7 in n2 gnd nfet w=1.8e-06 l=6e-07 ad=1.107e-11 as=2.7e-12 pd=1.35e-05
> +ps=4.8e-06
> mx23 gnd nena n7 gnd nfet w=3.6e-05 l=6e-07 ad=5.4e-11 as=5.4e-11 pd=3.9e-05
> +ps=3.9e-05
> mx15 n3 n2 n7 gnd nfet w=7.2e-06 l=6e-07 ad=1.08e-11 as=1.107e-11 pd=1.02e-05
> +ps=1.35e-05
> mx17 n7 n3 n4 gnd nfet w=1.62e-05 l=6e-07 ad=4.725e-11 as=1.458e-11
> +pd=7.575e-06 ps=1.8e-06
> mx16 n4 n3 n7 gnd nfet w=1.62e-05 l=6e-07 ad=1.458e-11 as=2.43e-11 pd=1.8e-06
> +ps=1.92e-05
> mx22 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=5.076e-11 as=3.807e-11
> +pd=2.595e-05 ps=3.6e-06
> mx21 n7 n4 out gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx20 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx19 n7 n4 out gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=3.807e-11
> +pd=3.6e-06 ps=3.6e-06
> mx18 out n4 n7 gnd nfet w=2.115e-05 l=9e-07 ad=3.807e-11 as=4.725e-11
> +pd=3.6e-06 ps=7.575e-06
>
> ----------------------------------------------------------------
> |
> | ex2 - An example of how a tristate buffer model is built. This
> | example uses the [NoModel] switch to create "dummy" input
> | and enable pins that have no corresponding models in the
> | IBIS file.
> |
>
> |
> | Specify the IBIS version and file revision number.
> |
> [IBIS Ver] 2.1
> [File rev] 0
>
> |
> | Add some comments to identify the file.
> |
> [date] April 1, 2001
> [source] From MegaFLOPS Inc. layout and silicon models.
> [notes] I really wouldn't try to use this driver. It's really bad.
> [disclaimer] This file is only for demonstration purposes. It describes
> a really crummy tri-state driver.
>
> You can put blank lines in any of these sections. (But s2ibis2 won't
> print them.)
>
> Of course, as noted in the documentation, any text in these sections is
> truncated at 1KB.
>
> [Copyright] Copyright 2001 MegaFLOPS Inc.
>
> |
> | Give the spice type. Allowable values are hspice, pspice, spice2,
> | spice3 and spectre.
> |
> [Spice type] hspice
>
> |
> | Now specify some global parameters. These parameters will apply to
> | _all_ the models in this file.
> |
> | Note on the [Temperature range] keyword: Since this is a CMOS circuit,
> | the min column contains the highest temperature, since this temperature
> | causes or amplifies the "min" (slow, weak) behavior, while the max
> | column contains the lowest temperature, since this temperature causes or
> | amplifies the "max" (fast, strong) behavior. If this were a bipolar
> | circuit, these temperature values would be reversed.
> |
> [temperature range] 27 100 0
> [voltage range] 3.3 3 3.6
> [sim time] 3ns
> [vil] 0 0 0
> [vih] 3.3 3 3.6
> [rload] 500
>
> |
> | Specify the default pin parasitics
> |
> [R_pkg] 2.0m 1.0m 4.0m
> [L_pkg] 0.2nH 0.1nH 0.4nH
> [C_pkg] 2pF 1pF 4pF
>
> |
> | Component Description
> |
> [Component] MCM Trisate Driver
> [manufacturer] MegaFLOPS Inc.
>
> |
> | Specify the SPICE file where the circuit is located.
> |
> [Spice file] tristate.sp
>
> |
> | Now specify the pin list. Since we're just creating an IBIS file for
> | the driver, we'll use a very short pin list.
> |
> | The pin list formats can be found in doc/s2ibis2.txt. Briefly, the
> | first line of each pin is of the form
> |
> | pin_name spice_node signal_name model_name
> |
> | If a pin description has more than one line (e.g. the first pin in the
> | pin list below), the second line is of the form
> |
> | -> input_pin enable_pin
> |
> | Note that the second line must begin with the symbol "->".
> |
> | Therefore, a "translation" of the pin list below would read:
> |
> | - The first pin is pin number "out". It corresponds to node "out" in
> | the given SPICE file. The signal carried on this pin is named
> | "out". This pin is represented by the model "tristate_driver";
> | it is driven by pin number "in" and is enabled by pin number
> | "enable".
> | - The second pin is pin number "in", which corresponds to node "in"
> | in the SPICE file; its signal is named "in". The model for this
> | pin is "dummy".
> | - The third pin is pin number "enable", which corresponds to node
> | "enable" in the SPICE file; its signal is named "enable". The
> | model for this pin is "dummy" (the same model as the input pin).
> | - The fourth pin is pin number "gnd", which corresponds to node "gnd"
> | in the SPICE file; it carries the "gnd" signal. The model for this
> | pin is "GND", which is an s2ibis2 reserved word that denotes a
> | ground supply pin.
> | - The fifth pin is pin number "vdd", which corresponds to node "vdd"
> | in the SPICE file; it carries the "vdd" signal. The model for this
> | pin is "POWER", which is an s2ibis2 reserved word that denotes a
> | power supply pin.
> |
> [Pin]
> out out out tristate_driver
> -> in ena
> in in in dummy
> ena enable enable dummy
> gnd gnd gnd GND
> vdd vdd vdd POWER
>
> |
> | Now we give the particulars of the model "tristate_driver". It is of
> | type "3-State" (allowable types may be found in doc/s2ibis2.txt) and is
> | non-inverting. We want to use models from the file "spectre.mod" for
> | typ, min and max simulations, and we want to include both a rising and
> | falling waveform in our IBIS model. Both the rising and falling
> | wveforms have a 500 ohm load; the rising waveform has the load
> | grounded, while the falling waveform has the load connected to 3.3V.
> | Neither waveform includes any other test fixture or package parasitics.
> |
> [Model] tristate_driver
> [Model type] 3-state
> [Polarity] Non-inverting
> [Enable] active-low
> [Model file] spectre.mod spectre.mod spectre.mod
> [Rising waveform] 500 0 NA NA NA NA NA NA NA
> [Falling waveform] 500 3.3 NA NA NA NA NA NA NA
>
> |
> | Now specify stuff for the model "dummy". Since we only wanted to model
> | the driver, we use the [NoModel] switch to tell s2ibis2 not to create
> | this model.
> |
> [Model] dummy
> [nomodel]
>
This archive was generated by hypermail 2b28 : Sat Nov 24 2001 - 13:49:44 PST